KR100492184B1 - Method of driving plasma display panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel to improve contrast.

A method of driving a plasma display panel according to an exemplary embodiment of the present invention includes adjusting a pulse width of at least one stabilization pulse supplied to a scan electrode and a sustain electrode according to an average luminance level value during a stabilization period.

According to the driving method of the plasma display panel according to the present invention, by adjusting the pulse width of the stabilization pulse supplied in the reset period according to the value of the average luminance level, it is possible to reduce the emission of unnecessary light to improve the overall contrast.

Description

Driving method of plasma display panel {METHOD OF DRIVING PLASMA DISPLAY PANEL}

The present invention relates to a plasma display panel, and more particularly, to a method of driving a plasma display panel to improve contrast.

Plasma Display Panels (hereinafter referred to as "PDPs") are characterized by emitting phosphors by 147 nm ultraviolet rays generated during discharge of an inert mixed gas such as He + Xe, Ne + Xe or He + Xe + Ne. An image containing graphics is displayed. Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a scan electrode Y and a sustain electrode Z formed on the upper substrate 10, and an address electrode formed on the lower substrate 18. X). Each of the scan electrode Y and the sustain electrode Z has a line width smaller than the line widths of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z and is formed at one edge of the transparent electrode 13Y, 13Z).

The transparent electrodes 12Y and 12Z are usually formed on the upper substrate 10 by indium tin oxide (ITO). The metal bus electrodes 13Y and 13Z are usually formed of metals such as chromium (Cr) and formed on the transparent electrodes 12Y and 12Z to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode Y and the sustain electrode Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The partition wall 24 is formed in a stripe or lattice shape to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert mixed gas is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into a reset period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray scale according to the number of discharges.

Here, the reset period is divided into a front lighting period in which the lamp pulse is supplied and a stabilization period in which the stabilization pulse is supplied. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, the first subfield SF1 is divided into a reset period, an address period, and a sustain period. At this time, the reset period turns on all the cells as the entire lighting period. Subsequent subfields SF2 to SF8 are divided into an address period and a sustain period without a reset period. The address period of each subfield is the same for each subfield, while the sustain period is increased at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield.

3 is a view illustrating a driving waveform according to the PDP driving method shown in FIG. 2.

Referring to FIG. 3, the first subfield SF1 included in one frame of the conventional PDP is divided into a reset period RPD, an address period APD, and a sustain period SPD.

During the reset period RPD, all discharge cells in the PDP cause a reset discharge to turn on the discharge cells. In the address period APD, the discharge cells turned on in the reset period RPD are selectively turned off. In the sustain period SPD, sustain discharge is caused in discharge cells not selected in the address period APD.

The reset period RPD is divided into a front writing period RPD1 for supplying a lamp pulse to the scan electrode Y and the sustain electrode Z, and a stabilization period RPD2 for supplying a stabilization pulse.

In the front lighting period RPD1, the positive polarity (+) lamp pulse RPy is supplied to the scan electrode Y, and the negative electrode (−) lamp pulse RPz is supplied to the sustain electrode Z. In addition, the ground potential GND is supplied to the address electrode X during the front surface writing period RPD1. Here, the ramp pulse RPy of positive polarity (+) is set to the same voltage as the sustain voltage Vs. Further, the negative pulse pulse RPz is set to an absolute voltage higher than the sustain voltage Vs. (i.e., | Vs | <| -Vz |) During the front lighting period RPD1 as described above. When the positive (+) ramp pulse RPy is supplied to the scan electrode Y and the negative (-) ramp pulse RPz is supplied to the sustain electrode Z, the scan electrode Y and the sustain electrode ( The reset discharge is generated in all the discharge cells by the voltage difference between Z). Accordingly, a negative wall charge is formed on the scan electrode Y supplied with the positive ramp pulse RPy and a sustain electrode supplied with the negative pulse pulse RPz. (Z) forms positive wall charges.

In the stabilization period RPD2, the second stabilization pulse Rz is supplied to the sustain electrode Z, and the first stabilization pulse Ry is supplied to the scan electrode Y alternately. At this time, the voltage values of the first stabilization pulse Ry and the second stabilization pulse Rz are set equal to the sustain voltage Vs. Therefore, stabilization discharge occurs between the scan electrode Y and the sustain electrode Z due to the difference in the sustain voltage Vs between the scan electrode Y and the sustain electrode Z, so that uniform wall charges are formed in all the discharge cells. (I.e., the discharge cells are turned on).

In the address period APD, scan pulses SP are sequentially supplied to the scan electrode lines Y to the negative scan voltage −Vy, and scan pulses are applied to the address electrodes X. The data pulse DP synchronized with SP is supplied. At this time, in the discharge cells supplied with the data pulse DP, an address discharge, that is, an erase discharge occurs, and the discharge cells are turned off.

In the sustain period SPD, sustain pulses are alternately supplied to the scan electrodes Y and the sustain electrodes Z. FIG. When a sustain pulse is supplied to the scan electrodes Y and the sustain electrodes Z, a sustain discharge is generated in discharge cells not selected in the address period APD. In this case, the gray level value corresponding to the luminance weight is expressed by adjusting the number of sustain discharges.

Meanwhile, the remaining subfields except the first subfield do not include the reset period RPD. In other words, the remaining subfields repeat the address period APD and the sustain period SPD and express luminance according to the gray scale value. In detail, in the first subfield, all the discharge cells are turned on during the reset period RPD in order to drive the PDP in the selective erasing method. Thereafter, in the remaining subfields except for the first subfield, the gray level value is selectively turned off while selectively turning off the discharge cells turned on during the reset period (RPD) of the first subfield. Express.

However, this selective erasing method has a disadvantage of low contrast because it emits unnecessary light because the full screen is turned on in the non-display period of the reset period. In other words, when the load is highest, that is, when all the discharge cells are turned on, a large amount of current is required because a large amount of current must be supplied. Therefore, the width of the pulse supplied in the reset period should be set so that a voltage high enough to turn on all the discharge cells can be supplied. On the other hand, when the load is small, that is, when the discharge cell is turned on less, since the current is not supplied much, the discharge cell can be turned on sufficiently even at a low voltage. However, since the width of the pulse supplied in the reset period is set so that a high voltage can be supplied based on when all the discharge cells are turned on, even when displaying a dark screen that does not require a high voltage, a high voltage is supplied to emit unnecessary light. As a result, contrast is lowered.

Accordingly, the present invention is to provide a method for driving a plasma display panel that can improve contrast.

In order to achieve the above object, the driving method of the plasma display panel according to the embodiment of the present invention comprises the step of dividing the average luminance level value into a plurality of reference values based on a predetermined value, and at least supplied to the scan electrode and the sustain electrode during the stabilization period; And adjusting the pulse width of one stabilization pulse according to a reference value including an average luminance level value .

When the average luminance level value is equal to or greater than a first reference value, the pulse width of the stabilization pulse may be set to a relatively wide first pulse width.

The first pulse width is set to 20 kHz or less.

When the average luminance level value is smaller than the first reference value and larger than the second reference value, the pulse width of the stabilization pulse is set to a second pulse width narrower than the first pulse width.

The second pulse width is set to 15 kHz or less.

When the average luminance level is less than or equal to the second reference value, the pulse width of the stabilization pulse may be set to a third pulse width narrower than the second pulse width.

The third pulse width is set to 10 kHz or less.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 7.

On the other hand, the PDP is used to adjust the number of sustain pulses according to the average luminance level (hereinafter referred to as "APL") so that the power consumption can be uniformly processed.

4 is a diagram illustrating a sustain voltage value corresponding to an average luminance level.

Referring to FIG. 4, since the PDP determines the brightness according to the number of sustain pulses, if the number of sustains is the same when the average brightness is dark and the brightness is high, various problems such as deterioration in image quality, power consumption, and panel damage occur. Can be. For example, when the number of sustain pulses is set low for all the input images, the contrast is reduced. In addition, when the number of sustain pulses is set to high for all input images, the brightness may be brighter and the contrast may be increased even in a dark image, but the panel may be damaged such as power consumption increases and the panel temperature increases. Therefore, it is necessary to appropriately adjust the total number of sustain pulses according to the average brightness of the input image. That is, the number of sustain pulses is determined corresponding to the APL value. Here, when the panel load is large (that is, when many discharge cells are turned on), the APL value is set high, and when the panel load is small (that is, when fewer discharge cells are turned on), the APL value is set low.

Here, the APL value and the number of sustain pulses are set in inverse proportion as shown in FIG. 4. In other words, as the APL value increases, the number of sustain pulses decreases, and as the APL value decreases, the sustain pulse number increases. As such, when the APL value and the number of sustain pulses are inversely related, the power consumed by the PDP can be kept constant. According to the APL value, it is possible to improve the PDP quality by changing the pulse width supplied during the reset period in three steps.

5 to 7 are waveform diagrams illustrating a method of driving a plasma display panel according to an exemplary embodiment of the present invention.

5 to 7, the first subfield SF1 included in one frame of the PDP according to an embodiment of the present invention is divided into a reset period RPD, an address period APD, and a sustain period SPD. Driven.

During the reset period RPD, all discharge cells in the PDP cause a reset discharge to turn on the discharge cells. In the address period APD, the discharge cells turned on in the reset period RPD are selectively turned off. In the sustain period SPD, sustain discharge is caused in discharge cells not selected in the address period APD.

The reset period RPD is divided into a front writing period RPD1 for supplying a lamp pulse to the scan electrode Y and the sustain electrode Z and a stabilization period RPD2 for supplying a stabilization pulse.

In the front lighting period RPD1, the positive polarity (+) lamp pulse RPy is supplied to the scan electrode Y, and the negative electrode (−) lamp pulse RPz is supplied to the sustain electrode Z. In addition, the ground potential GND is supplied to the address electrode X during the front surface writing period RPD1. Here, the ramp pulse RPy of positive polarity (+) is set to the same voltage as the sustain voltage Vs. Further, the negative pulse pulse RPz is set to an absolute voltage higher than the sustain voltage Vs. (i.e., | Vs | <| -Vz |) During the front lighting period RPD1 as described above. When the positive (+) ramp pulse RPy is supplied to the scan electrode Y and the negative (-) ramp pulse RPz is supplied to the sustain electrode Z, the scan electrode Y and the sustain electrode ( The reset discharge is generated in all the discharge cells by the voltage difference between Z). Accordingly, a negative wall charge is formed on the scan electrode Y supplied with the positive ramp pulse RPy and a sustain electrode supplied with the negative pulse pulse RPz. (Z) forms positive wall charges.

In the stabilization period RPD2, the second stabilization pulses Rz1, Rz2, and Rz3 are supplied to the sustain electrode Z, and the first stabilization pulses Ry1, Ry2, and Ry3 are supplied to the scan electrode Y alternately. . At this time, the voltage values of the first stabilization pulses Ry1, Ry2 and Ry3 and the second stabilization pulses Rz1, Rz2 and Rz3 are set equal to the sustain voltage Vs. Therefore, stabilization discharge occurs between the scan electrode Y and the sustain electrode Z due to the difference in the sustain voltage Vs between the scan electrode Y and the sustain electrode Z, so that uniform wall charges are formed in all the discharge cells. (I.e., the discharge cells are turned on).

At this time, in section A of FIG. 4, since the APL value is greater than or equal to the first reference value, the displayed screen may be a bright screen. Therefore, since relatively many discharge cells need to be turned on, the first and second stabilization pulses Ry1 and Rz1 supplied to the scan electrode Y and the sustain electrode Z during the stabilization period RPD2 as shown in FIG. 5A. The first pulse width n1, which is the pulse width of, is set relatively wide. For example, the first pulse width n1 may be set to 20 ms or less. The first and second stabilization pulses Ry1 and Rz1 having the first pulse width n1 form wall charges such that relatively many discharge cells can be turned on during the stabilization period RPD2.

Meanwhile, in section B of FIG. 4, since the APL value is smaller than the first reference value and larger than the second reference value, the displayed screen may be a screen having medium brightness. Therefore, the discharge cells may be turned on less than the discharge cells that should be turned on when the APL value is greater than or equal to the first reference value so as to have intermediate brightness without having to turn on relatively many discharge cells. Since there is no need to turn on a relatively large number of discharge cells, the second pulse width n2 which is the pulse width of the first and second stabilization pulses Ry2 and Rz2 supplied during the stabilization period RPD2 is determined by the first pulse width n1. Even if it is set narrower than that, that is, even if the wall charge is formed less, there is no difficulty in turning on the discharge cells. Accordingly, as shown in FIG. 6, the second pulse width which is the pulse width of the first and second stabilization pulses Ry2 and Rz2 supplied to the scan electrode Y and the sustain electrode Z during the stabilization period RPD2. (n2) may be set narrower than the first pulse width n1. For example, the second pulse width n2 may be set to 15 ms or less. The first and second stabilization pulses Ry2 and Rz2 having the second pulse width n2 form wall charges that can turn on the discharge cells to have intermediate brightness during the stabilization period RPD2. Since the second pulse width n2 is set narrower than the first pulse width n1, the amount of wall charges formed during the stabilization period RPD2 is reduced, and the emission of unnecessary light can be reduced.

Meanwhile, in section C of FIG. 4, since the APL value is less than or equal to the second reference value, the displayed screen may be a dark screen. Therefore, only a small number of discharge cells may be turned on. Since only a small number of discharge cells need to be turned on, the third pulse width n3, which is the pulse width of the first and second stabilization pulses Ry3 and Rz3 supplied during the stabilization period RDP2, is defined as the first pulse width n1. However, even if it is set narrower than the second pulse width n2, that is, even if the wall charge is weakly formed, there is no difficulty in turning on a small number of discharge cells. Accordingly, as shown in FIG. 7, the third pulse width which is the pulse width of the first and second stabilization pulses Ry3 and Rz3 supplied to the scan electrode Y and the sustain electrode Z during the stabilization period RPD2. (n3) may be set narrower than the second pulse width n2. For example, the third pulse width n3 may be set to 10 ms or less. The first and second stabilization pulses Ry3 and Rz3 having the third pulse width n3 form wall charges that can turn on only a portion of the discharge cells so as to make a dark screen during the stabilization period RPD2. Thus, since the third pulse width n3 is set to be smaller than the first pulse width n2 as well as the second pulse width n2, the amount of wall charges formed during the stabilization period RPD2 is not only weak, but also unnecessary Can reduce emissions.

As such, by adjusting the pulse widths of the first and second stabilization pulses supplied to the scan electrode Y and the sustain electrode Z according to the APL value, unnecessary light emission can be reduced to improve overall contrast.

In the address period APD, scan pulses SP are sequentially supplied to the scan electrode lines Y to the negative scan voltage −Vy, and scan pulses are applied to the address electrodes X. The data pulse DP synchronized with SP is supplied. At this time, in the discharge cells supplied with the data pulse DP, an address discharge, that is, an erase discharge occurs, and the discharge cells are turned off.

In the sustain period SPD, sustain pulses SUSPy and SUSPz are supplied to the scan electrodes Y and the sustain electrodes Z alternately. When the sustain pulses SUSPy and SUSPz are supplied to the scan electrodes Y and the sustain electrodes Z, sustain discharge is generated in discharge cells that are not selected in the address period APD. In this case, the gray level value corresponding to the luminance weight is expressed by adjusting the number of sustain discharges.

Meanwhile, the remaining subfields except the first subfield do not include the reset period RPD. In other words, the remaining subfields repeat the address period APD and the sustain period SPD and express luminance according to the gray scale value. In detail, in the first subfield SF1, all the discharge cells are turned on during the reset period RPD to drive the PDP in the selective erasing method. Thereafter, in the remaining subfields except for the first subfield, the gray level value is selectively turned off while selectively turning off the discharge cells turned on during the reset period (RPD) of the first subfield. Express.

As described above, according to the driving method of the plasma display panel according to the present invention, by adjusting the pulse width of the stabilization pulse supplied in the reset period according to the value of the average luminance level, it is possible to reduce the emission of unnecessary light to improve the overall contrast. have.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a view showing one frame of a conventional plasma display panel.

3 is a view illustrating a driving waveform according to the method of driving the plasma display panel shown in FIG. 2;

4 is a diagram illustrating a sustain voltage value corresponding to an average luminance level.

5 is a view showing a driving waveform supplied when the APL value is high according to an embodiment of the present invention.

6 is a diagram illustrating a driving waveform supplied when an APL value is intermediate according to an exemplary embodiment of the present invention.

7 is a view showing a driving waveform supplied when the APL value is low according to an embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 18: lower substrate

Y: scan electrode Z: sustain electrode

X: address electrode 12Y, 12Z: transparent electrode

13Y, 13Z: metal bus electrode 14: upper dielectric layer

16: protective film 22: lower dielectric layer

24: partition 26: phosphor layer

Claims (7)

A driving method of a plasma display panel in which a reset period is driven by being divided into a front writing period and a stabilizing period, Dividing the average luminance level value into a plurality of reference values based on a predetermined value; And adjusting a pulse width of at least one stabilization pulse supplied to a scan electrode and a sustain electrode according to a reference value including the average luminance level value during the stabilization period. The method of claim 1, And the pulse width of the stabilization pulse is set to a relatively wide first pulse width if the average luminance level value is equal to or greater than a first reference value. The method of claim 2, And the first pulse width is set to 20 mW or less. The method of claim 2, And the pulse width of the stabilizing pulse is set to a second pulse width narrower than the first pulse width when the average luminance level value is smaller than the first reference value and larger than the second reference value. The method of claim 4, wherein And the second pulse width is set to 15 kHz or less. The method of claim 4, wherein And if the average luminance level value is less than or equal to the second reference value, the pulse width of the stabilization pulse is set to a third pulse width narrower than the second pulse width. The method of claim 6, And the third pulse width is set to 10 mW or less.