KR100553931B1 - Method for Driving Plasma Display panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel to prevent bright spot mis-discharge.

The driving method of the plasma display panel is time-divisionally driven into an initialization period including a setup period and a setdown period, an address period for selecting a cell, and a sustain period for sustaining discharge, and a plurality of sustain electrodes, a plurality of scan electrodes and the electrodes A method of driving a plasma display panel in which a plurality of address electrodes are formed to intersect with each other and 10% or more of xenon (Xe) is included in a discharge gas injected into a discharge space; Supplying a rising ramp waveform to the scan electrodes in which the ramp voltage rises to a peak voltage and the peak voltage is maintained for a predetermined time during the setup period; Supplying a falling ramp waveform to the scan electrodes that falls from a first positive voltage lower than the peak voltage during the set down period; And supplying a second positive voltage lower than the peak voltage to the sustain electrodes from a time period within which the voltage of the scan electrode rises due to the rising ramp waveform to a time point when the address period ends.

Description

Driving method for plasma display panel {Method for Driving Plasma Display panel}             

1 is a perspective view showing a discharge cell structure of a plasma display panel according to an embodiment of the present invention.

2 shows a frame of a general plasma display panel.

3 is a waveform diagram showing a driving method of a conventional plasma display panel.

4 is a waveform diagram showing a method of driving a plasma display panel according to an embodiment of the present invention;

FIG. 5A is a view showing wall charges generated during an initialization period by the driving method shown in FIG. 4; FIG.

FIG. 5B is a view showing wall charges generated during an initialization period by the driving method shown in FIG. 3; FIG.

6 is a waveform diagram illustrating a method of driving a plasma display panel according to another embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12Y, 12Z: transparent electrode

13Y, 13Z: bus electrode 14, 22: dielectric layer

16: protective film 18: lower substrate

24: partition 26: phosphor layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a plasma display panel to prevent bright spot mis-discharge.

Plasma Display Panel (hereinafter referred to as "PDP") displays characters or graphics by emitting phosphors by 147 nm ultraviolet rays generated during discharge of He + Xe, He + Ne + Xe or Ne + Xe inert mixed gases. The included image is displayed. Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a scan electrode Y and a sustain electrode Z formed on an upper substrate 10, and an address electrode formed on a lower substrate 18. (X) is provided. Each of the scan electrode Y and the sustain electrode Z has a line width smaller than the line widths of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z and is formed at one edge of the transparent electrode 13Y, 13Z).

The transparent electrodes 12Y and 12Y are usually formed on the upper substrate 10 by indium tin oxide (ITO). The metal bus electrodes 13Y and 13Z are usually formed of metals such as chromium (Cr) and formed on the transparent electrodes 12Y and 12Z to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode Y and the sustain electrode Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 from sputtering by ions generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The partition wall 24 is formed in a stripe or lattice shape to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert mixed gas is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into an initialization period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges.

Here, the initialization period is divided into a setup period in which the rising ramp waveform is supplied and a set down period in which the falling lamp waveform is supplied. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period is increased at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. .

3 is a waveform diagram showing a conventional method for driving a PDP.

Referring to FIG. 3, the conventional PDP is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, a rising ramp waveform Ramp-up that rises to the peak voltage Vp is simultaneously applied to all the scan electrodes Y. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. The rising ramp waveform Ramp-up rises to the peak voltage Vp and then maintains the peak voltage Vp for a predetermined time.

In the set-down period, a falling ramp waveform Ramp-down, which falls from the positive voltage lower than the peak voltage Vp to the negative voltage -Vr, is simultaneously applied to the scan electrodes Y. Ramp-down generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniformly distributing the wall charges required for address discharges in the cells of the full screen. Will remain.

In the address period, a negative scan pulse scan is sequentially applied to the scan electrodes Y and a positive data pulse data is applied to the address electrodes X. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. Wall charges necessary for cell discharge in the sustain period are generated in the cells selected by the address discharge.

On the other hand, the positive electrode DC voltage of the sustain voltage level Vs is supplied to the sustain electrodes Z during the set down period and the address period.

In the sustain period, sustain pulses Vs are applied to the scan electrodes Y and the sustain electrodes Z alternately. Then, the cell selected by the address discharge is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z each time the sustain pulse Vs is applied while the wall voltage and the sustain pulse Vs in the cell are added. Discharge occurs. Finally, after the sustain discharge is completed, an erase ramp waveform (erase) having a small pulse width is supplied to the sustain electrode Z to erase wall charges in the cell.

On the other hand, in the related art, a method has been proposed in which the luminance can be increased by increasing the density of the Xe component in the discharge gas enclosed in the PDP (the Xe density is set to approximately 10% or more). In detail, the conventional PDP used commercially has an efficiency of approximately 1 to 1.5 lm / W. However, when the Xe component is set to 10% or more in the PDP, the efficiency is about 2.0 lm / W. Therefore, the high density Xe PDP has an advantage of displaying an image having a higher luminance than that of a conventional PDP.

However, such a high density Xe PDP has a disadvantage in that a higher driving voltage is required than in the related art. In other words, when a high density of Xe is injected into the PDP, the probability of discharge is lowered by the Xe component. Accordingly, a driving voltage having a high voltage value must be applied to stably generate a discharge. In fact, in the high-density Xe PDP, a data pulse having a high voltage value is applied to cause stable address discharge.

In addition, there is a problem in that a stable initialization discharge does not occur during the initialization period of the high-density Xe PDP, so that a false discharge in the form of a bright spot occurs. In detail, during the setup period in which the rising ramp waveform Ramp-up is supplied, no setup discharge occurs in some discharge cells due to the increase in the discharge voltage due to the high density Xe component. In discharge cells in which no setup discharge is generated, there is a problem in that bright discharge in the form of a bright point occurs during the set down period in which the ramp ramp is applied.

Accordingly, an object of the present invention is to provide a method for driving a PDP that can prevent bright spot mis-discharge in a PDP in which high density xenon (Xe) is injected.

It is still another object of the present invention to provide a method of driving a PDP in which a driving voltage of a PDP into which high density xenon (Xe) is injected can be lowered.

In order to achieve the above object, the driving method of the PDP according to the present invention is time-division driven into an initialization period including a setup period and a setdown period, an address period for selecting a cell, and a sustain period for sustaining discharge, and a plurality of sustain electrodes And a method of driving a PDP in which a plurality of scan electrodes and a plurality of address electrodes intersecting the electrodes are formed, and at least 10% of xenon (Xe) is included in the discharge gas injected into the discharge space; Supplying a rising ramp waveform to the scan electrodes in which the ramp voltage rises to a peak voltage and the peak voltage is maintained for a predetermined time during the setup period; Supplying a falling ramp waveform to the scan electrodes that falls from a first positive voltage lower than the peak voltage during the set down period; And supplying a second positive voltage lower than the peak voltage to the sustain electrodes from a time period within which the voltage of the scan electrode rises due to the rising ramp waveform to a time point when the address period ends.
The driving method of the PDP includes applying a scan pulse to the scan electrodes and supplying a data pulse to the address electrodes during the address period; And alternately applying sustain pulses of sustain voltage alternately to the scan electrodes and the sustain electrodes during the sustain period.
The voltage of the first positive polarity is the same voltage as the sustain voltage.
The second positive voltage is set to ± 10% of the sustain voltage.
The second positive voltage starts to be applied at a specific point in time after 30% of the rising ramp waveform.
The second positive voltage is applied while the peak voltage is maintained.
The set down period is set to 280 ms or less.

delete

delete

delete

delete

delete

Other objects and features of the present invention in addition to the above object will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 6.

4 is a waveform diagram showing a driving method according to an embodiment of the present invention. Such a driving waveform of the present invention is applied when the Xe component is set to 10% or more in the high density Xe, that is, the PDP discharge gas.

Referring to FIG. 4, the PDP according to the embodiment of the present invention is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, a rising ramp waveform Ramp-up that rises to the peak voltage Vp is simultaneously applied to all the scan electrodes Y. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. The rising ramp waveform Ramp-up rises to the peak voltage Vp and then maintains the peak voltage Vp for a predetermined time.

In the set-down period, a falling ramp waveform Ramp-down, which falls from the positive voltage lower than the peak voltage Vp to the negative voltage -Vr, is simultaneously applied to the scan electrodes Y. Ramp-down generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniformly distributing the wall charges required for address discharges in the cells of the full screen. Will remain.

Meanwhile, a positive voltage Vb having a voltage value of ± 10% of the sustain voltage Vs is applied to the sustain electrodes Z during a part of the setup period. This positive voltage Vb is applied between 30% and 100% of the time when the rising ramp waveform Rmap-up is set to 100%. In other words, the positive voltage Vb applied to the sustain electrodes Z is applied at a specific point in time after 30% of the rising ramp waveform Rmap-up, so as to scan the sustain electrodes Z and the scan. The voltage difference between the electrodes Y is lowered. As such, during the period in which the positive voltage Vb is applied to the sustain electrodes Z, the setup discharge is stably generated between the scan electrodes Y and the address electrodes Z. FIG.

The setup period will be described in detail. First, most of the discharge cells are caused by the rising ramp waveform Ramp-up applied to the scan electrodes Y when the positive voltage Vb is not applied to the sustain electrodes Z. In this case, the setup discharge is generated between the scan electrode (Y) and the sustain electrode (Z) and / or between the scan electrode (Y) and the address electrode (X). However, as described in the prior art, the setup discharge is not generated in some discharge cells by the high density Xe component.

Thereafter, when a positive voltage Vb is applied to the sustain electrodes Z at a specific time after 30% of the setup period, setup discharge occurs between the scan electrodes Y and the address electrodes X of all the discharge cells. Will be. In detail, when the positive voltage Vb is not applied, the electric field formed by the rising ramp waveform Ramp-up applied to the scan electrodes Y maintains the same potential (ie, the base potential). It is divided into sustain electrodes Z and address electrodes X, and thus concentration of an electric field is weakened. However, when the positive voltage Vb is applied to the sustain electrodes Z, most of the electric field formed by the rising ramp waveform Ramp-up applied to the scan electrodes Y may be connected to the scan electrodes Y. Since it is distributed between the address electrodes (X), the electric field density between the two electrodes is increased. Accordingly, stable discharge occurs between the scan electrodes Y and the address electrode X during the period in which the positive voltage Vb is applied to the sustain electrodes Z. FIG.

On the other hand, more positive wall charges are formed in the address electrode X than during the setup period. That is, since discharge occurs only between the scan electrodes Y and the address electrode X during the period in which the positive voltage Vb is applied to the sustain electrodes Z, the address electrode X has more positive polarities than the conventional one. Wall charges are formed. Here, since no setup discharge occurs during the period in which the positive voltage Vb is applied to the sustain electrodes Z, less wall charges are formed than in the prior art.

Thereafter, the sustain electrodes Z maintain the positive voltage Vb during the period in which the ramp ramp is applied to the scan electrodes Y in the set-down period. On the other hand, in the present invention, it is possible to shorten the slope of the falling ramp waveform (that is, the set-down period is shortened) than in the prior art.

In detail, a small amount of positive wall charges are formed in the sustain electrodes Z to which the positive voltage Vb is applied during the setup period. Since a small amount of wall charges are formed on the sustain electrodes Z, the strong discharge is generated between the scan electrodes Y and the sustain electrodes Z even when the slope of the falling ramp waveform Rmap-down is large. It does not occur. In other words, when the falling ramp waveform Ramp-down is supplied to the scan electrodes Y, the scan electrodes Y having the relatively negative potential Y and the sustain having the positive potential Vb are maintained. A discharge is generated between the electrodes Z. At this time, since the amount of wall charges accumulated on the sustain electrodes Z is small, relatively weak discharges are generated between the scan electrodes Y and the sustain electrodes Z even when the slope of the falling ramp waveform Rmap-down is set to a large value. Will be generated. In fact, the set down period of the conventional PDP is set to 280 to 320 ms, while the set down period of the present invention is set to 280 ms or less. As such, when the setup period is shortened, the time allotted to the sustain period is increased, thereby improving the luminance of the PDP.

Meanwhile, as a result of simulating the initialization period of the present invention, as shown in FIG. 5A, wall charges of about 83V are formed on the scan electrode Y, and wall charges of about −11V are formed on the address electrode X. This can be seen that the amount of the wall charge of about 72V formed on the scan electrode Y and the wall charge of about -3V on the address electrode X during the setup period of the conventional PDP shown in FIG. 5B. That is, in the present invention, wall charges having a high voltage value can be formed in the initialization period, and accordingly, the voltage value of the data pulse data supplied in the address period can be reduced. That is, the present invention can lower the driving voltage at a high voltage level required by increasing the Xe component in the discharge gas, so that the high-density Xe panel can be applied to satisfy high brightness and low voltage driving at the same time. In addition, in the present invention, it is possible to prevent the false discharge in the form of bright spots generated during the initialization period.

In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes Y, and the positive data pulse data is applied to the address electrodes X, and the positive electrode is applied to the sustain electrodes Z. The voltage Vb is continuously applied. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. Wall charges are generated in the cells selected by the address discharge.

In the sustain period, sustain pulses Vs are applied to the scan electrodes Y and the sustain electrodes Z alternately. Then, the cell selected by the address discharge is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z each time the sustain pulse Vs is applied while the wall voltage and the sustain pulse Vs in the cell are added. Discharge occurs. Finally, after the sustain discharge is completed, an erase ramp waveform (erase) having a small pulse width is supplied to the sustain electrode Z to erase wall charges in the cell.

6 is a waveform diagram showing a driving method according to another embodiment of the present invention. Such a driving waveform of the present invention is applied when the Xe component is set to 10% or more in the high density Xe, that is, the PDP discharge gas.

Referring to FIG. 6, a PDP according to another embodiment of the present invention is driven by being divided into an initialization period for initializing a full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, a rising ramp waveform Ramp-up that rises to the peak voltage Vp is simultaneously applied to all the scan electrodes Y. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. The rising ramp waveform Ramp-up rises to the peak voltage Vp and then maintains the peak voltage Vp for a predetermined time.

In the set-down period, a falling ramp waveform Ramp-down, which falls from the positive voltage lower than the peak voltage Vp to the negative voltage -Vr, is simultaneously applied to the scan electrodes Y. Ramp-down generates weak erase discharges in the cells, eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniform wall charges required for address discharges in the cells of the full screen. Is left.

Meanwhile, a positive voltage Vb having a voltage value of ± 10% of the sustain voltage Vs is applied to the sustain electrodes Z during a part of the setup period. This positive voltage Vb is applied during a period when the rising ramp waveform Ramp-up rises to maintain the peak voltage Vp. As described above, the setup discharge is stably generated between the scan electrodes Y and the address electrodes Z during the period in which the positive voltage Vb is applied.

The setup period will be described in detail. First, most of the discharge cells are caused by the rising ramp waveform Ramp-up applied to the scan electrodes Y when the positive voltage Vb is not applied to the sustain electrodes Z. In this case, a setup discharge occurs with the sustain electrode Z or the address electrode X. However, as described in the prior art, the setup discharge is not generated in some discharge cells by the high density Xe component.

Subsequently, when the positive voltage Vb is applied to the sustain electrodes Z while the rising ramp waveform Ramp-up maintains the peak voltage Vp, the scan electrodes Y and the address electrodes of all discharge cells are applied. The setup discharge is generated between them. In detail, when the positive voltage Vb is not applied, the electric field formed by the rising ramp waveform Ramp-up applied to the scan electrodes Y maintains the same potential (ie, the base potential). The storage electrodes Z and the address electrodes X are distributed to each other, thereby weakening the concentration of the electric field. However, when the positive voltage Vb is applied to the sustain electrodes Z, most of the electric field formed by the rising ramp waveform Ramp-up applied to the scan electrodes Y is generated by the scan electrodes Y. It is distributed between the address electrodes X, and the electric field density between the two electrodes is increased. Accordingly, stable discharge occurs between the scan electrodes Y and the address electrode X during the period in which the positive voltage Vb is applied to the sustain electrodes Z. FIG.

On the other hand, more positive wall charges are formed in the address electrode X than during the setup period. That is, since discharge occurs only between the scan electrodes Y and the address electrode X during the period in which the positive voltage Vb is applied to the sustain electrodes Z, the address electrode X has more positive polarities than the conventional one. Wall charges are formed. Here, since no setup discharge occurs during the period in which the positive voltage Vb is applied to the sustain electrodes Z, the sustain electrodes Z are formed with less wall charges than in the prior art.

Thereafter, the sustain electrodes Z maintain the positive voltage Vb during the period in which the ramp ramp is applied to the scan electrodes Y in the set-down period. On the other hand, in the present invention, the set down period can be shorter than before. In detail, since the wall charges are formed on the sustain electrodes Z during the set-up period, the scan electrodes Y and the sustain electrodes Z are set even when the slope of the ramp ramp is set large. Stable discharge can be generated in the liver. In fact, the set down period of the conventional PDP is set to 280 to 320 ms, while the set down period of the present invention is set to 280 ms or less.

In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes Y, and the positive data pulse data is applied to the address electrodes X, and the positive electrode is applied to the sustain electrodes Z. The voltage Vb is continuously applied. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. Wall charges are generated in the cells selected by the address discharge.

In the sustain period, sustain pulses Vs are applied to the scan electrodes Y and the sustain electrodes Z alternately. Then, the cell selected by the address discharge is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z each time the sustain pulse Vs is applied while the wall voltage and the sustain pulse Vs in the cell are added. Discharge occurs. Finally, after the sustain discharge is completed, an erase ramp waveform (erase) having a small pulse width is supplied to the sustain electrode Z to erase wall charges in the cell.

As described above, according to the driving method of the PDP according to the present invention, by applying a positive voltage to the sustain electrode during the setup period of the high-density xenon (Xe) PDP, it is possible to prevent the occurrence of bright point discharge in the initialization period. In addition, during the initialization period, the wall charges having a higher voltage value than the conventional ones may be formed on the address electrode and the wall charges having the lower voltage values than the conventional ones may be driven at the low voltage.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

A time division driving operation including a setup period and a setup period including a set-down period, an address period for selecting a cell, and a sustain period for sustaining discharge, and a plurality of sustain electrodes and a plurality of scan electrodes and a plurality of address electrodes intersecting the electrodes. A method of driving a plasma display panel in which 10% or more of xenon (Xe) is formed in the formed discharge gas injected into the discharge space; Supplying a rising ramp waveform to the scan electrodes in which the ramp voltage rises to a peak voltage and the peak voltage is maintained for a predetermined time during the setup period; Supplying a falling ramp waveform to the scan electrodes that falls from a first positive voltage lower than the peak voltage during the set down period; And supplying the sustain electrodes with a second positive voltage lower than the peak voltage from a time point within which the voltage of the scan electrode rises due to the rising ramp waveform to a time point when the address period ends. A method of driving a plasma display panel. According to claim 1, Applying a scan pulse to the scan electrodes and supplying a data pulse to the address electrodes during the address period; Alternately applying sustain pulses of sustain voltage alternately to the scan electrodes and the sustain electrodes during the sustain period; And wherein the voltage of the first positive polarity is the same as that of the sustain voltage. The method of claim 2, And the second positive voltage is set to ± 10% of the sustain voltage. The method of claim 1, And wherein the second positive voltage starts to be applied at a specific point in time after 30% of the rising ramp waveform rises. The method of claim 1, And the second positive voltage is applied while the peak voltage is maintained. The method of claim 1, And the set down period is set to 280 ms or less.

Images