KR100489877B1 - Apparatus and method for driving plasma display panel - Google Patents

Abstract

The present invention relates to a driving method and a driving apparatus of a plasma display panel which enables stable operation at low temperature.

According to an exemplary embodiment of the present invention, a method of driving a plasma display panel includes simultaneously applying scan pulses to the i and i + 1 scan electrodes (i is odd or even) during a first half subfield when the panel is driven at a low temperature; And sequentially applying scan pulses in units of one scan line during subfields other than the first half subfield, wherein the scan pulses are wider pulses than when driven at a temperature higher than room temperature.

Description

Driving apparatus and driving method of plasma display panel {APPARATUS AND METHOD FOR DRIVING PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus and a driving method of a plasma display panel, and more particularly, to a driving apparatus and a driving method of a plasma display panel to enable stable operation at low temperatures.

Plasma Display Panel (hereinafter referred to as "PDP") displays an image including text or graphics by emitting phosphors by 147 nm ultraviolet rays generated during discharge of He + Xe or Ne + Xe inert mixed gas. . Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a scan electrode Y and a sustain electrode Z formed on the upper substrate 10, and an address electrode formed on the lower substrate 18. X). Each of the scan electrode Y and the sustain electrode Z has a line width smaller than the line widths of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z and is formed at one edge of the transparent electrode 13Y, 13Z).

The transparent electrodes 12Y and 12Y are usually formed on the upper substrate 10 by indium tin oxide (ITO). The metal bus electrodes 13Y and 13Z are usually formed of metals such as chromium (Cr) and formed on the transparent electrodes 12Y and 12Z to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode Y and the sustain electrode Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The partition wall 24 is formed in parallel with the address electrode X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert mixed gas is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into an initialization period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges.

Here, the initialization period is divided into a setup period in which the rising ramp waveform is supplied and a set down period in which the falling lamp waveform is supplied. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period is increased at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. .

3 shows driving waveforms of a PDP supplied to two subfields.

Referring to FIG. 3, the PDP is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, the rising ramp waveform Ramp-up is applied to all the scan electrodes Y simultaneously. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. During the set down period, after the rising ramp waveform Ramp-up is supplied, the falling ramp waveform Ramp-down falling at the positive voltage lower than the peak voltage of the rising ramp waveform Ramp-up is applied to the scan electrodes Y. It is applied at the same time. Ramp-down generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniformly distributing the wall charges required for address discharges in the cells of the full screen. Will remain.

In the address period, a negative scan pulse scan is sequentially applied to the scan electrodes Y and a positive data pulse data is applied to the address electrodes X. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. Wall charges are generated in the cells selected by the address discharge.

On the other hand, the positive electrode DC voltage of the sustain voltage level Vs is supplied to the sustain electrodes Z during the set down period and the address period.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. Then, the cell selected by the address discharge is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z each time the sustain pulse sus is applied while the wall voltage and the sustain pulse sus in the cell are added. Discharge occurs. Finally, after the sustain discharge is completed, an erase ramp waveform (erase) having a small pulse width is supplied to the sustain electrode Z to erase wall charges in the cell.

In the conventional PDP driven as described above, a miswriting phenomenon occurs when operating at a low temperature (about 20 ° C to -20 ° C). In other words, a miswriting phenomenon occurs at a low temperature in the operation characteristic experiment of the PDP according to the operating temperature. This miswriting phenomenon occurs because the particle motion is slowed at low temperatures and the discharge is delayed. In other words, at low temperatures, the discharge delay increases, so that no address discharge occurs during the period in which the scan pulse is supplied.

In detail, the scan pulse supplied to the first electrode in the address period may be set to 1.3 mV as shown in FIG. 4. At this time, the data pulse of 1.3 GHz is also supplied to the address electrode in synchronization with the scan pulse.

When the scan pulse set to the predetermined width is supplied to the first electrode Y and the data pulse is supplied to the address electrode X, the address discharge is generated in the discharge cell. At this time, since the discharge delay is small at a temperature higher than the low temperature (20 ° C. or more), the discharge generation time may be located within the scan pulse width to cause stable address discharge.

However, at low temperatures (approximately 20 ° C. to −20 ° C.), since the discharge delay is larger than the temperature above the low temperature, sufficient address discharge may not occur during the time that the scan pulse is supplied. In other words, as shown in FIG. 4, at low temperature (approximately 20 ° C. to −20 ° C.), the discharge generation time is located at the boundary of the scan pulse due to the discharge delay, thereby causing miswriting.

On the other hand, in order to prevent such a miswriting phenomenon, a method of setting the width of the scan pulse at a low temperature has been proposed. However, there is a limit to increasing the width of the scan pulse within a constant address period. In other words, if the width of the scan pulse is constantly increased, the address period is increased. Therefore, as the address period increases, the sustain period decreases, so that an image with sufficient luminance cannot be displayed. In addition, if the width of the scan pulse increases more than a predetermined value, the driving of the PDP becomes impossible.

Accordingly, it is an object of the present invention to provide a driving apparatus and a driving method of a plasma display panel which enable stable operation at low temperatures.

In order to achieve the above object, the driving method of the plasma display panel according to the present invention is to simultaneously apply scan pulses to the i and i + 1 scan electrodes (i is odd or even) during the first half subfield when the panel is driven at low temperature. And applying scan pulses sequentially in units of one scan line during subfields other than the first half subfield, wherein the scan pulses are wider pulses than when driven at a temperature above room temperature. The first half subfield includes a first subfield and a second subfield. The widths of the scan pulses supplied during subfields other than the first half subfield and the first half subfield are equally set. The temperature is divided into levels, and as the temperature decreases, the number of subfields included in the first half subfield increases. The width of the scan pulse is increased. The driving apparatus of the plasma display panel according to the present invention includes a scan driver for driving the scan electrode, an address driver for driving the address electrode, and a temperature sensor for monitoring the driving temperature of the panel. And when the temperature input from the temperature sensor is low, scan pulses are simultaneously applied to the i th and i + 1 scan electrodes (i is odd or even) during the first half subfield, and during the subfields other than the first half subfield. And a timing controller for controlling the scan driver and the address driver so that scan pulses are sequentially applied in units of one scan line, and scan pulses applied to subfields other than the first half subfield and the first half subfield from the temperature sensor. It is characterized in that the pulse is wider than the input temperature is above room temperature. The first half subfield includes a first subfield and a second subfield. The widths of the scan pulses supplied during the first half subfield and the subfields other than the first half subfield are set to be the same. Divided into levels, a bit control signal is supplied to the timing controller, and the timing controller increases the number of subfields included in the first half subfield and the width of the scan pulse as the temperature decreases.

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 6.

5 is a waveform diagram illustrating a method of driving a plasma display panel according to an embodiment of the present invention.

Referring to FIG. 5, in the exemplary embodiment of the present invention, different driving waveforms are supplied at a low temperature (about 20 ° C. to −20 ° C.) and at a temperature higher than the low temperature. Here, the driving waveforms supplied to the electrodes Y, Z, and X of the PDP at a temperature higher than or equal to the low temperature are the same as in the prior art shown in FIG.

In addition, different driving waveforms are supplied to the first half subfield and the subfields other than the first half when the PDP is driven at low temperature.

The first half subfield will be described in detail. First, the rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y in the setup period of the initialization period. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. During the set down period, after the rising ramp waveform Ramp-up is supplied, the falling ramp waveform Ramp-down falling at the positive voltage lower than the peak voltage of the rising ramp waveform Ramp-up is applied to the scan electrodes Y. It is applied at the same time. Ramp-down generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniformly distributing the wall charges required for address discharges in the cells of the full screen. Will remain.

In the address period, a scan pulse is applied in a double scan method in which a negative scan pulse is applied in units of two scan electrodes (Y). A positive data pulse data is applied to the address electrodes X during the address period. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. Wall charges are generated in the cells selected by the address discharge.

On the other hand, in this embodiment of the present invention, the scan pulse (scan) is supplied in a double scan method. In other words, a scan pulse is simultaneously applied to the i th and i + 1 th scanning electrodes (i is odd or even). As such, when a scan pulse is applied in units of two scan electrodes Y, an address period is shortened. Therefore, the width of the scan pulse can be set to a wide interval T2. That is, when the PDP is driven at a low temperature, the width T2 of the scan pulse is set to be wider than the width T1 of the conventional scan pulse shown in FIG. You can prevent it.

In the present invention, the double scan method is applied only to the first half subfield, for example, the first to second subfields. In this way, when a scan pulse is supplied in the double scan method from the first to second subfields (that is, the address period of the first and second subfields is shortened), the scan pulses are supplied during the remaining subfields except the first subfield. The width of the scan pulse can also be set to a wide interval T2. Therefore, in the present invention, the miswriting phenomenon can be prevented by setting the width of the scan pulse to a wide interval T2 at low temperature. In addition, in the present invention, as the temperature decreases, the number of subfields driven by the double scan method increases and the width of the scan pulse is wider.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. Then, the cell selected by the address discharge is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z each time the sustain pulse sus is applied while the wall voltage and the sustain pulse sus in the cell are added. Discharge occurs. Finally, after the sustain discharge is completed, an erase ramp waveform (erase) having a small pulse width is supplied to the sustain electrode Z to erase wall charges in the cell.

6 is a view showing a driving apparatus of a plasma display panel according to an embodiment of the present invention.

Referring to FIG. 6, the PDP driving apparatus according to the embodiment of the present invention includes a scan driver 44 for driving the scan electrodes Y and an address driver 46 for driving the address electrodes X. FIG. And a temperature sensor 40 for monitoring the drive temperature of the panel, and a timing controller 42 for controlling the scan driver 44 and the address driver 46.

The scan driver 44 supplies a driving waveform to the scan electrodes Y. The address driver 46 supplies a driving waveform to the address electrodes Y.

The timing controller 42 receives a vertical / horizontal synchronization signal and generates a timing control signal for the scan driver 44 and the address driver 46, and transmits the timing control signal to the scan driver 44 and the address driver 46. To supply. The timing controller 42 determines the width of the scan pulse and the number of subfields to be driven by the double scan driving method in response to the driving temperature of the panel input from the temperature sensor 40.

The temperature sensor 40 supplies a control signal to the timing controller 42 while monitoring the driving temperature of the panel. The temperature sensor 40 generates different bit control signals and supplies them to the timing controller 42 when driving at a low temperature of the panel and when driving at a temperature higher than the low temperature. In addition, even at low temperatures, as the temperature decreases, control signals of different bits are generated and supplied to the timing controller 42. For example, when the panel is driven at room temperature, the temperature sensor 40 supplies a control signal of "0000" to the timing controller 42. Further, when the panel is driven at 0 ° C, the control signal of "0010" can be supplied to the timing controller 42, and when the panel is driven at -10 ° C, the control signal of "0100" can be supplied to the timing controller 42. have.

Referring to the operation process in detail, first, the temperature sensor 40 supplies the first control signal to the timing controller 42 when the panel is driven at a temperature higher than the low temperature. The timing controller 42 supplied with the first control signal from the temperature sensor 40 controls the scan driver 44 and the address driver 46 to supply the driving waveform shown in FIG. 3.

Meanwhile, the temperature sensor 40 supplies the second control signal to the timing controller 42 when the panel is driven at low temperature. The timing controller 42 supplied with the second control signal from the temperature sensor 40 sets the number of subfields and the width of the scan pulse to be driven in a double scan method in correspondence with the current temperature to be driven by the scan driver 44 and The address driver 46 is controlled. In this case, as shown in FIG. 5, the first half subfields are driven in a double scan method, and subfields other than the first half subfield are driven in a sequential driving manner. In addition, as the temperature decreases, the timing controller 42 increases the number of subfields driven by the double scan method and sets the width of the scan pulse to be wider, thereby preventing the occurrence of a miswriting phenomenon at low temperatures.

As described above, according to the driving apparatus and driving method of the plasma display panel according to the present invention, the width of the scan pulse can be set to be wider by driving the first half subfield by the double scan method during low temperature driving, and thus, the low temperature miss lighting phenomenon. Can be prevented.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a view showing a frame of a plasma display panel;

3 is a waveform diagram showing a driving method of a conventional plasma display panel.

4 is a diagram showing a discharge generation time corresponding to a width of a scan pulse;

5 is a waveform diagram illustrating a method of driving a plasma display panel according to an embodiment of the present invention.

6 is a block diagram showing a driving apparatus of a plasma display panel according to an embodiment of the present invention;

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12Y, 12Z: transparent electrode

13Y, 13Z: bus electrode 14, 22: dielectric layer

16: protective film 18: lower substrate

24: partition 26: phosphor layer

40: temperature sensor 42: timing controller

44: scan driver 46: address driver

Claims (12)

In a driving method of a plasma display panel including a scan electrode and an address electrode formed on the panel, Simultaneously applying scan pulses to the i th and i + 1 th scan electrodes (i is an odd or even number) during the first half subfield when the panel is driven at a low temperature; Sequentially applying scan pulses in units of one scan line during subfields other than the first half subfield; The scan pulse is a plasma display panel driving method, characterized in that the wider pulse than when driving at a temperature above room temperature. delete. The method of claim 1, And said first half subfield comprises a first subfield and a second subfield. The method of claim 1, And the widths of the scan pulses supplied during subfields other than the first half subfield and the first half subfield are equally set. delete. The method of claim 1, The low temperature is divided into a plurality of temperature levels, and as the temperature decreases, the number of subfields included in the first half subfield increases and the width of the scan pulse is widened. In a driving apparatus of a plasma display panel including a scan electrode and an address electrode formed on the panel, A scan driver for driving the scan electrode; An address driver for driving the address electrode; A temperature sensor for monitoring a driving temperature of the panel; When the temperature input from the temperature sensor is low, scan pulses are simultaneously applied to the i th and i + 1 scan electrodes (i is odd or even) during the first half subfield, and one of the subfields other than the first half subfield is applied. And a timing controller for controlling the scan driver and the address driver so that scan pulses are sequentially applied in units of scan lines, wherein scan pulses applied to subfields other than the first subfield and the first subfield are input from a temperature sensor. The driving device of the plasma display panel, characterized in that the pulse is wider than when the temperature is above room temperature. delete. The method of claim 7, wherein The first subfield includes a first subfield and a second subfield. The method of claim 7, wherein And the widths of the scan pulses supplied during subfields other than the first half subfield and the first half subfield are equally set. delete. The method of claim 7, wherein The temperature sensor divides a low temperature into a plurality of temperature levels and supplies a bit control signal to the timing controller. The timing controller is configured to adjust the number of subfields included in the first half subfield and the width of the scan pulse as the temperature decreases. Driving device for a plasma display panel, characterized in that for increasing.