KR100483405B1 - Flat Drive Liquid Crystal Display - Google Patents

Abstract

On the transparent insulating substrate, a gate line made of a gate line in the horizontal direction, a gate electrode, and a gate line made of gate pads at the end of the gate line, and a common line made of a plurality of common electrodes and common electrode lines connecting them in the pixel region are formed. A first data line including a first data line defining a pixel region, a source / drain electrode, a data pad, and a pixel electrode facing at regular intervals in parallel with each other is formed to cross the gate line insulated through the gate insulating film. . A second data line including a second data line, a second data pad, and an auxiliary gate pad connected to the first data line, the first data pad, and the gate pad, respectively, is formed through the contact windows formed in the passivation layer. Here, the first or second data line and the common electrode adjacent thereto overlap each other to block light leaking at the boundary of the pixel area. If the data lines are formed in this manner, disconnection thereof can be prevented, and when the light leaking to the second data line is blocked, a protective film and a gate insulating film are formed therebetween, so that these short circuits can be prevented. In addition, the pad portion may be formed in double, and the upper pad may be formed of chromium, molybdenum, molybdenum alloy, or ITO to ensure reliability. Since the first or second data line and the common electrode replace the function of the black matrix, the aperture ratio is improved.

Description

Flat Drive Liquid Crystal Display

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device of a planar driving method.

A liquid crystal display device mainly used at present is a twisted nematic (TN) type liquid crystal display device. In the twisted nematic method, electrodes are installed on two substrates, the liquid crystal directors are arranged to be twisted by 90 °, and a voltage is applied to the electrodes to drive the liquid crystal directors. However, such a liquid crystal display device has a problem that the viewing angle is narrow, and an in-plane switching (IPS) type liquid crystal display device has been developed to replace the liquid crystal display device. This prior art is shown in US Pat. No. 5,598,285.

However, the liquid crystal display device disclosed in US Pat. No. 5,598,285 has the following problems.

Due to the difference between the two electrodes for applying the horizontal electric field, that is, the common electrode and the pixel electrode, rubbing of the alignment layer formed on the electrode is nonuniform, resulting in a light leakage phenomenon in this portion, resulting in a low contrast ratio.

In addition, an unwanted potential difference is generated between the data line applying the voltage to the pixel electrode and the common electrode, so that light is transmitted through this portion and the light is directly visible from the side, which is caused by side cross talk. Will appear. As a method of removing such a phenomenon, a method of widening a black matrix formed to block light leaking at a boundary of a pixel region or narrowing a gap between a common electrode and a data line has been proposed. However, it is difficult to completely block leakage of light, and when the black matrix is formed wide, the aperture ratio decreases, and when the gap between the common electrode and the data line is narrowed, the two wirings are frequently shorted.

In addition, at the end of the wiring, there is a pad portion exposed to the outside to receive a signal. When the wiring is formed of low-resistance aluminum, the exposed aluminum is easily oxidized, and electrical contact is poor at this portion. .

An object of the present invention is to eliminate the light leakage phenomenon in a flat drive type liquid crystal display device.

Another object of the present invention is to reduce the disconnection of the wiring and to prevent the short circuit of the data line and the common electrode.

Another object of the present invention is to improve the aperture ratio and to reduce the defect of the pad portion.

In the liquid crystal display device substrate according to the present invention for solving this problem, a gate line is formed on a transparent insulating substrate, and first and second data lines are insulated and intersected through the first insulating film. In this case, the first and second data lines are formed side by side with the second insulating film interposed therebetween, and they are connected to each other through the first contact hole formed in the second insulating film. In the pixel region defined by the intersection of the gate line and the data line, the common electrode and the pixel electrode are formed to face each other at a predetermined interval, and the common electrode adjacent to the first or second data line has the first and second insulating layers therebetween. It overlaps with a 1st or 2nd data line.

In this structure, since the first or second data line and the common electrode adjacent to each other overlap each other to block light passing through the portion, the portion replaces the black matrix.

Further, first and second insulating films are formed between the common electrode and the first or second data lines overlapping each other, so that short circuits thereof are reduced, and short circuits thereof are formed by forming the first and second data lines.

In the liquid crystal display according to the present invention, a gate electrode connected to the gate line, a source electrode connected to the first or second data line, and a pixel electrode are connected to a portion where the gate line and the first and second data lines cross each other. A thin film transistor formed of a drain electrode is formed. The first and second data pads connected to the ends of the first and second data lines, respectively, are connected through a second contact hole formed in the second insulating layer, and the third and second data pads are connected to the gate pad connected to the gate line. The auxiliary gate pad is connected through the contact hole.

At this time, the pads formed on the upper side among the first and second data pads, the gate pads, and the auxiliary gate pads may be formed of chromium, molybdenum, molybdenum alloy, or ITO in order to secure electrical contact reliability.

Next, embodiments of the planar driving type liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

1 is a layout view of a liquid crystal display device of a planar driving method according to a first embodiment of the present invention, FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1, and FIG. 3 is a thin film transistor unit of FIG. 1. It is sectional drawing along the III-III line. 4 and 5 are cross-sectional views of the gate pad portion IV-IV and the data pad portion V-V line in FIG. 1, respectively.

1 to 5, the gate line 20 is formed in the horizontal direction on the lower transparent insulating substrate 100, and the gate pad 22 is formed at the end of the gate line 20. Part of the gate line 20 becomes the gate electrode 21. The common electrode line 10 is formed in parallel with the gate line 20, and a plurality of common electrodes 11 are connected to the common electrode line 10 in the pixel area to receive a common signal from the common electrode line 10. , 12) is formed in the longitudinal direction. Here, various conductive materials may be used as the metals for the gate wirings 20, 21, 22 and the common wirings 10, 11, and 12, and chromium, aluminum, aluminum alloys, molybdenum, molybdenum alloys, or the like. It is also possible to form a double layer combining these metals.

The gate insulating film 30 made of silicon nitride or the like is covered on the gate wirings 20, 21, 22 and the common wirings 10, 11, 12.

The semiconductor layer 40 of the thin film transistor made of amorphous silicon is formed in an island shape on the gate insulating layer 30 on the gate electrode 21, and the amorphous silicon layer 40 is heavily doped with phosphorus (P) on the amorphous silicon layer 40. The ohmic contacts 51 and 52 made of silicon are formed on both sides of the gate electrode 21.

A source electrode 61 and a drain electrode 62 made of metal are formed on the ohmic contact layers 51 and 52, respectively, and the source electrode 61 is formed on the gate insulating layer 30 in the vertical direction. The drain electrode 62 is connected to the pixel electrode 65 which is linearly formed alternately with the common electrode 11 in the pixel area. A data pad 63 for receiving an image signal from the outside is formed at the end of the first data line 60. As shown in FIGS. 1 and 2, the first data line 60 has a common electrode 12 adjacent thereto. It is formed inside.

In this case, the first data wires 60, 61, 62, 63, and 65 may be formed of a metal layer such as chromium or an aluminum alloy, molybdenum, or molybdenum alloy, and may be thinly formed to a thickness of about 500 kPa or less. This is because the light leakage phenomenon can be reduced by reducing the step difference between the layers due to the pixel electrode 65 to suppress the unevenness of the alignment generated in the rubbing process.

The gate electrode 21, the gate insulating layer 30, the amorphous silicon layer 40, the ohmic contact layers 51 and 52, the source and drain electrodes 61 and 62 form a thin film transistor, and the thin film transistor and the remaining first The protective film 70 covering the data wires 60, 61, 62, 63, 65 is made of silicon nitride or the like.

In the passivation layer 70, contact holes 71 and 73 exposing portions of the first data line 60 and the data pad 63 are formed, respectively, and the gate insulating layer 30 and the passivation layer 70 are provided with gate pads. The contact hole 72 which exposes a part of 22 is formed.

The metal pattern is formed on the passivation layer 70 in the same form as the first data interconnections 60 and 63, and the first data interconnection lines 60 and 63 are formed through the contact holes 71 and 73 formed in the passivation layer 70. ) And second data wires 80 and 83 are formed. In addition, an auxiliary gate pad 82 connected to the gate pad 22 is formed on the gate pad 22 through the contact hole 72 formed in the passivation layer 70 and the gate insulating layer 30. As shown in FIG. 2, both edge portions of the second data line 80 overlap with the two common electrodes 12 adjacent thereto. Accordingly, the second data line 80 and the common electrode 12 adjacent to the second data line 80 block light leaking from the portion adjacent to the second data line 80 and replace the black data. In addition, as shown in FIG. 2, since the passivation layer 70 and the gate insulating layer 30 are formed between the second data line 80 and the common electrode 12 adjacent thereto, a short circuit occurring between them is significantly reduced. . In this case, the second data lines 80, 82, and 83 may be formed of a single film of chromium, molybdenum, molybdenum alloy, aluminum alloy, or a plurality of films formed therefrom. In this case, since the second data wires 80, 82, and 83 also constitute a pad part, the second data wires 80, 82, and 83 may be formed of chromium, molybdenum, molybdenum alloy, or the like, which can have reliability as the pad part. In addition, since the thickness of the second data wires 80, 82, and 83 is other than the pixel region, the thickness of the second data wires 80, 82, and 83 is less than that of the pixel electrode 65 layer.

Here, the pixel area is an area defined by the intersection of the gate line 20 and the first and second data lines 60 and 80.

Meanwhile, the black matrix 90 is formed in the horizontal direction on the upper transparent insulating substrate 200. Here, both edge portions of the black matrix 90 are formed to overlap the common electrode line 10 of the lower substrate 100.

In this case, in the liquid crystal display according to the present invention, the black matrix in the vertical direction does not need to be formed, so that the opening in the horizontal direction increases in the pixel area, thereby improving the aperture ratio.

In the first exemplary embodiment of the present invention, the second data line 80 is used to block the light leaking with the common electrode 12 and to intersect the gate line 20 with the first data line 60. Although disconnection due to the step is prevented, this function may be provided to the first data line by forming the first data line wider than the second data line.

In this case, when the light leaking in the vicinity of the first data line and the common electrode adjacent thereto is blocked, the second data line may be formed of indium tin oxide (ITO).

Unlike the above embodiment, the pixel electrode and the source / drain electrode may be formed when the second data line is formed. In this case, it is advantageous to form the thickness of the pixel electrode at about 500 mW or less in terms of preventing light leakage. In this case, since the metal forming the pixel electrode forms a pad portion, the pixel electrode may be formed of chromium, molybdenum, molybdenum alloy, ITO, or the like which can have reliability as the pad portion.

On the other hand, unlike in the first embodiment of the present invention, when the upper layer is formed of ITO with the metal layer under the second data lines 80, 82, and 83, the contact reliability as a pad can be further increased.

Next, a case in which the first data line has a function of blocking light leaking with the common electrode and preventing the disconnection of the data line will be described through the second embodiment.

FIG. 6 is a layout view illustrating a structure of a substrate for a liquid crystal display according to a second exemplary embodiment of the present invention, and FIG. 7 is a cross-sectional view illustrating a portion VII-VII in FIG. 6.

In the second embodiment of the present invention, the thin film transistor portion, the gate pad portion, the data pad portion, and the transparent substrate on the upper portion are similar to those of the first embodiment, and detailed drawings thereof will be omitted.

Most of the structure is similar to that of the first embodiment, but as shown in FIGS. 6 and 7, the second data line 80 is formed narrower than the first data line 60. Here, the first data line 60 is connected to the second data line 80 through the contact hole 71 to prevent disconnection of the second data line 80. The second portion 64 blocks the light leaking from the common electrode 12 at the boundary. As shown in FIG. 7, the second portion 64 is divided into two light blocking wires 64 again, and the inner portion of the 64 has a second data line (with the passivation layer 70 interposed therebetween). 80 and an outer portion thereof overlaps the common electrode 12 with the gate insulating film 30 therebetween.

The structure according to the second exemplary embodiment of the present invention has two light blocking wires 64 between both the second data line 80 and the common electrode 12 so that the light incident at an angle to the substrate 100 may be inclined. It can also cut off completely, which has the advantage of effectively reducing side crosstalk.

On the other hand, as a method for blocking light leaking from the boundary portion of the pixel region, as described above, one of two data lines is formed to have a wide width and used as a light blocking film, but two common electrodes are formed adjacent to each other. There is also a way. This will be described through a third embodiment of the present invention.

FIG. 8 is a layout view illustrating a structure of a substrate for a liquid crystal display according to a second exemplary embodiment of the present invention, and FIG. 9 is a cross-sectional view illustrating a portion IX-IX in FIG. 8.

In the third embodiment of the present invention, the thin film transistor portion, the gate pad portion, the data pad portion, and the transparent substrate on the upper portion are similar to those of the first embodiment, and thus detailed drawings thereof will be omitted.

Most of the structure is similar to that of the second embodiment, but as shown in FIG. 8, the first data line 60 is formed only at a portion where the second data line 80 and the gate line 20 overlap each other. There is no wiring for this. In addition, as shown in FIGS. 8 and 9, two common electrodes 12 adjacent to the second data line 80 are formed in a wider width or adjacent to each other than the first and second embodiments of the present invention. It overlaps with the data line 80.

Since the passivation layer 70 and the gate insulating layer 30 are formed between the second data line 80 and the common electrode 12, the structure according to the third exemplary embodiment of the present invention is common to the second data line 80. This has the advantage of completely blocking the short circuit of the electrode 12.

As in the embodiment of the present invention, the wires can be prevented from being disconnected by forming the first and second data lines, and the light leakage phenomenon is formed by overlapping the first or second data lines with a common electrode or light blocking film adjacent thereto. Can be removed and the aperture ratio can be improved. In addition, reliability can be improved in the pad portion, and short circuits between the data line and the common electrode can be prevented.

1 is a layout view of a liquid crystal display device of a planar driving method according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1,

3 is a cross-sectional view taken along line III-III of the thin film transistor unit of FIG. 1;

4 and 5 are cross-sectional views respectively taken along the line IV-IV as the gate pad portion and V-V as the data pad portion in FIG. 1,

6 is a layout view illustrating a structure of a substrate for a liquid crystal display according to a second exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a portion VII-VII in FIG.

FIG. 8 is a layout view illustrating a structure of a substrate for a liquid crystal display according to a second exemplary embodiment of the present invention.

FIG. 9 is a cross-sectional view illustrating a portion IX-IX in FIG. 8. FIG.

Claims (15)

A plurality of gate lines formed parallel to each other on a transparent substrate, First and second data lines which are insulated from and cross the gate line, are formed side by side with a first insulating film interposed therebetween, and are connected to each other through a first contact hole of the first insulating film; A common electrode formed in a plurality of pixel areas defined by intersections of the gate lines and the first and second data lines, and overlapping the first or second data lines at boundaries of the pixel areas; A pixel electrode formed to face the common electrode at a predetermined interval in the pixel area; And a thin film transistor having a gate electrode, a source electrode, and a drain electrode connected to the gate line, the first or second data line, and the pixel electrode. In claim 1, A first data pad formed of the same metal layer as the first data line, and And a second data pad formed of the same metal layer as the second data line. And the first data pad and the second data pad are connected to each other through a second contact hole of the first insulating layer. In claim 2, And a layer formed on the upper side of the first and second data pads including chromium, molybdenum, molybdenum alloy, or ITO. In claim 3, And a layer made of ITO on the upper portion of the first and second data pads. In claim 1, A gate pad formed at an end of the gate line, and And an auxiliary gate pad formed of the same metal layer as the first or second data line and connected to the gate pad through a third contact hole formed in the first insulating layer. In claim 5, The auxiliary gate pad is made of chromium, molybdenum, molybdenum alloy, or ITO. In claim 6, And a layer made of ITO on the auxiliary gate pad. In claim 1, At least one of the first and second data lines is formed of the same layer as the pixel electrode. In claim 8, The pixel electrode has a thickness of 500 kPa or less. In claim 1, And a second insulating film between the common electrode and the first or second data line. In claim 10, And the first and second insulating layers are formed between the common electrode and the first or second data line. In claim 1, The common electrode and the gate line are formed of the same metal layer. In claim 1, One of the first or second data lines is divided into a first portion crossing the gate line and a second portion overlapping the common electrode. In claim 1, And a common electrode line formed in parallel with the gate line and connecting the plurality of common electrodes. In claim 13, And a black matrix overlapping the gate line and the common electrode line.