KR100370838B1 - Bga반도체패키지및그제조방법 - Google Patents
Bga반도체패키지및그제조방법 Download PDFInfo
- Publication number
- KR100370838B1 KR100370838B1 KR10-1998-0023666A KR19980023666A KR100370838B1 KR 100370838 B1 KR100370838 B1 KR 100370838B1 KR 19980023666 A KR19980023666 A KR 19980023666A KR 100370838 B1 KR100370838 B1 KR 100370838B1
- Authority
- KR
- South Korea
- Prior art keywords
- circuit board
- package
- semiconductor package
- forming
- manufacturing
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 46
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 15
- 238000000465 moulding Methods 0.000 claims description 15
- 150000001875 compounds Chemical class 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 239000002184 metal Substances 0.000 abstract description 9
- 229910052751 metal Inorganic materials 0.000 abstract description 9
- 230000008646 thermal stress Effects 0.000 abstract description 7
- 230000035882 stress Effects 0.000 abstract description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052802 copper Inorganic materials 0.000 abstract description 2
- 239000010949 copper Substances 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (3)
- 회로패턴(11)이 인쇄된 필름형 회로기판(10)의 테두리부분(13)에 상기 필름형 회로기판(10)과 열팽창계수가 같은 프레임층(101)을 형성하여 패키지성형부(40)를 갖는 판형 회로기판(100)을 형성하고, 상기 판형 회로기판(100)의 패키지성형부(40)를 패키지(50) 성형하여서 된 BGA 반도체패키지.
- 제1항에 있어서, 상기 필름형 회로기판(10)에 성형되는 프레임층(101)과 패키지성형부(40)에 성형되는 패키지(50)가 열팽창계수가 같은 재질로 구성됨을 특징으로 하는 BGA 반도체패키지.
- 일정한 회로패턴(11)이 인쇄된 필름형 회로기판(10)을 사용하여 상면에는 몰드컴파운드에 의한 패키지(50) 성형이 이루어지고 하면에는 다수의 솔더볼(4)을 구비한 BGA 반도체패키지를 제조함에 있어서,금형(도시생략)에 회로패턴(11)이 인쇄된 유연성의 필름형 회로기판(10)을 세팅해서 필름형 회로기판(10)의 테두리부분(13)에 상기 필름형 회로기판(10)과 열팽창계수가 같은 몰드컴파운드에 의한 프레임층(101)을 성형하여 패키지성형부(40)를 갖는 판형 회로기판(100)을 제조하는 1차 성형단계;판형 회로기판(100)의 패키지성형부(40)에 구비된 다수개의 탑재부(12)에 접착제(3)를 도포하여 반도체칩(1)을 부착하고, 상기 반도체칩(1)과 회로패턴(11)을와이어(2)로 연결하여 판형 회로기판(100)에 회로를 실장하는 회로실장단계;회로가 실장된 판형 회로기판(100) 자재를 몰드금형(도시생략)에 세팅하여 상기 패키지성형부(40)에 몰드컴파운드에 의한 패키지(50)를 성형하는 패키지성형단계;를 포함함을 특징으로 하는 BGA 반도체패키지의 제조방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-1998-0023666A KR100370838B1 (ko) | 1998-06-23 | 1998-06-23 | Bga반도체패키지및그제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-1998-0023666A KR100370838B1 (ko) | 1998-06-23 | 1998-06-23 | Bga반도체패키지및그제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20000002758A KR20000002758A (ko) | 2000-01-15 |
KR100370838B1 true KR100370838B1 (ko) | 2003-07-18 |
Family
ID=19540460
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-1998-0023666A KR100370838B1 (ko) | 1998-06-23 | 1998-06-23 | Bga반도체패키지및그제조방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100370838B1 (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020043398A (ko) * | 2000-12-04 | 2002-06-10 | 마이클 디. 오브라이언 | 반도체 패키지 제조용 인쇄회로기판 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09219421A (ja) * | 1996-02-14 | 1997-08-19 | Hitachi Ltd | 半導体電子部品の製造方法およびウエハ |
JPH10144735A (ja) * | 1996-11-06 | 1998-05-29 | Sumitomo Metal Mining Co Ltd | 補強板付きテープキャリアおよびその製造方法 |
-
1998
- 1998-06-23 KR KR10-1998-0023666A patent/KR100370838B1/ko not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09219421A (ja) * | 1996-02-14 | 1997-08-19 | Hitachi Ltd | 半導体電子部品の製造方法およびウエハ |
JPH10144735A (ja) * | 1996-11-06 | 1998-05-29 | Sumitomo Metal Mining Co Ltd | 補強板付きテープキャリアおよびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
KR20000002758A (ko) | 2000-01-15 |
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