KR100362703B1 - 박막트랜지스터 제조방법 - Google Patents

박막트랜지스터 제조방법 Download PDF

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Publication number
KR100362703B1
KR100362703B1 KR1019990049938A KR19990049938A KR100362703B1 KR 100362703 B1 KR100362703 B1 KR 100362703B1 KR 1019990049938 A KR1019990049938 A KR 1019990049938A KR 19990049938 A KR19990049938 A KR 19990049938A KR 100362703 B1 KR100362703 B1 KR 100362703B1
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KR
South Korea
Prior art keywords
gate
pattern
ion implantation
auxiliary
layer
Prior art date
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Expired - Lifetime
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KR1019990049938A
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English (en)
Korean (ko)
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KR20010046242A (ko
Inventor
황장원
김동환
Original Assignee
삼성전자 주식회사
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Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR1019990049938A priority Critical patent/KR100362703B1/ko
Priority to JP2000343935A priority patent/JP4566388B2/ja
Priority to US09/709,648 priority patent/US6340609B1/en
Publication of KR20010046242A publication Critical patent/KR20010046242A/ko
Application granted granted Critical
Publication of KR100362703B1 publication Critical patent/KR100362703B1/ko
Assigned to 삼성디스플레이 주식회사 reassignment 삼성디스플레이 주식회사 권리지분의 전부이전등록 Assignors: 삼성전자 주식회사
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Liquid Crystal (AREA)
KR1019990049938A 1999-11-11 1999-11-11 박막트랜지스터 제조방법 Expired - Lifetime KR100362703B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019990049938A KR100362703B1 (ko) 1999-11-11 1999-11-11 박막트랜지스터 제조방법
JP2000343935A JP4566388B2 (ja) 1999-11-11 2000-11-10 薄膜トランジスタ製造方法
US09/709,648 US6340609B1 (en) 1999-11-11 2000-11-13 Method of forming thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019990049938A KR100362703B1 (ko) 1999-11-11 1999-11-11 박막트랜지스터 제조방법

Publications (2)

Publication Number Publication Date
KR20010046242A KR20010046242A (ko) 2001-06-05
KR100362703B1 true KR100362703B1 (ko) 2002-11-29

Family

ID=19619573

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990049938A Expired - Lifetime KR100362703B1 (ko) 1999-11-11 1999-11-11 박막트랜지스터 제조방법

Country Status (3)

Country Link
US (1) US6340609B1 (https=)
JP (1) JP4566388B2 (https=)
KR (1) KR100362703B1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100900543B1 (ko) * 2002-11-14 2009-06-02 삼성전자주식회사 박막 트랜지스터 기판의 다결정 규소 박막 트랜지스터 및그의 형성 방법

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6140160A (en) 1997-07-28 2000-10-31 Micron Technology, Inc. Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure
GB2399998B (en) * 2001-02-01 2005-04-13 Fujitsu Ltd Communications systems
KR100719933B1 (ko) * 2006-04-06 2007-05-18 비오이 하이디스 테크놀로지 주식회사 다결정 실리콘 채널을 갖는 박막 트랜지스터의 제조방법
US8153513B2 (en) * 2006-07-25 2012-04-10 Silicon Genesis Corporation Method and system for continuous large-area scanning implantation process

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6265455A (ja) * 1985-09-18 1987-03-24 Toshiba Corp 表示装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02226727A (ja) * 1989-02-28 1990-09-10 Oki Electric Ind Co Ltd Ｌｄｄ型ｍｏｓ半導体装置の製造方法
US5849601A (en) * 1990-12-25 1998-12-15 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same
JPH0555258A (ja) * 1991-08-29 1993-03-05 Sharp Corp 薄膜トランジスタの製造方法
JP2809247B2 (ja) * 1992-02-12 1998-10-08 シャープ株式会社 薄膜半導体素子の製造方法
JP3257086B2 (ja) * 1992-11-12 2002-02-18 セイコーエプソン株式会社 相補性薄膜半導体装置の製造方法
EP0923138B1 (en) * 1993-07-26 2002-10-30 Seiko Epson Corporation Thin -film semiconductor device, its manufacture and display sytem
JP3139896B2 (ja) * 1993-11-05 2001-03-05 株式会社東芝 半導体レイアウト方法
JP3578424B2 (ja) * 1995-09-13 2004-10-20 シャープ株式会社 アクティブマトリクス基板の製造方法
JP3476320B2 (ja) * 1996-02-23 2003-12-10 株式会社半導体エネルギー研究所 半導体薄膜およびその作製方法ならびに半導体装置およびその作製方法
KR100495794B1 (ko) * 1997-10-17 2005-09-28 삼성전자주식회사 액정표시장치용박막트랜지스터
JPH1197705A (ja) * 1997-09-23 1999-04-09 Semiconductor Energy Lab Co Ltd 半導体集積回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6265455A (ja) * 1985-09-18 1987-03-24 Toshiba Corp 表示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100900543B1 (ko) * 2002-11-14 2009-06-02 삼성전자주식회사 박막 트랜지스터 기판의 다결정 규소 박막 트랜지스터 및그의 형성 방법

Also Published As

Publication number Publication date
JP4566388B2 (ja) 2010-10-20
KR20010046242A (ko) 2001-06-05
JP2001177107A (ja) 2001-06-29
US6340609B1 (en) 2002-01-22

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