KR100349684B1 - Method for forming feram capable of preventing hydrogen diffusion using oxygen plasma - Google Patents
Method for forming feram capable of preventing hydrogen diffusion using oxygen plasma Download PDFInfo
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- KR100349684B1 KR100349684B1 KR1019990024989A KR19990024989A KR100349684B1 KR 100349684 B1 KR100349684 B1 KR 100349684B1 KR 1019990024989 A KR1019990024989 A KR 1019990024989A KR 19990024989 A KR19990024989 A KR 19990024989A KR 100349684 B1 KR100349684 B1 KR 100349684B1
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- 238000000034 method Methods 0.000 title claims description 31
- 239000001301 oxygen Substances 0.000 title claims description 23
- 229910052760 oxygen Inorganic materials 0.000 title claims description 23
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 title claims description 22
- 239000001257 hydrogen Substances 0.000 title abstract description 19
- 229910052739 hydrogen Inorganic materials 0.000 title abstract description 19
- 238000009792 diffusion process Methods 0.000 title abstract description 14
- 125000004435 hydrogen atom Chemical class [H]* 0.000 title description 5
- 238000002161 passivation Methods 0.000 claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 claims abstract description 13
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 9
- 229910052751 metal Inorganic materials 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 22
- 239000011229 interlayer Substances 0.000 claims description 21
- 150000002500 ions Chemical class 0.000 claims description 14
- 238000009832 plasma treatment Methods 0.000 claims description 14
- 239000003990 capacitor Substances 0.000 claims description 11
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 10
- 239000010410 layer Substances 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 10
- 150000002431 hydrogen Chemical class 0.000 abstract description 8
- 239000010408 film Substances 0.000 description 77
- 230000004888 barrier function Effects 0.000 description 7
- 239000005380 borophosphosilicate glass Substances 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 238000006731 degradation reaction Methods 0.000 description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 3
- 229910001260 Pt alloy Inorganic materials 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 229910052741 iridium Inorganic materials 0.000 description 3
- 229910052746 lanthanum Inorganic materials 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 230000010287 polarization Effects 0.000 description 3
- 230000002265 prevention Effects 0.000 description 3
- 229910052707 ruthenium Inorganic materials 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 229910018921 CoO 3 Inorganic materials 0.000 description 1
- 229910002661 O–Ti–O Inorganic materials 0.000 description 1
- 229910002655 O−Ti−O Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910010252 TiO3 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- HTXDPTMKBJXEOW-UHFFFAOYSA-N iridium(IV) oxide Inorganic materials O=[Ir]=O HTXDPTMKBJXEOW-UHFFFAOYSA-N 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- -1 oxygen ions Chemical class 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000011232 storage material Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40111—Multistep manufacturing processes for data storage electrodes the electrodes comprising a layer which is used for its ferroelectric properties
Abstract
본 발명은 금속배선간 절연막 및 페시베이션막 형성시 수소확산에 의한 강유전체 특성 저하를 효과적으로 방지할 수 있는 강유전체 메모리 소자 제조 방법에 관한 것으로, 층간절연막, 금속배선간 절연막 및 페시베이션막 형성 공정 전에 산소 플라즈마를 이용한 사전 처리를 실시하여 수소에 의한 손상을 방지하는데 그 특징이 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a ferroelectric memory device capable of effectively preventing the reduction of ferroelectric properties due to hydrogen diffusion during formation of an intermetallic insulating film and a passivation film. It is characterized by performing pretreatment using plasma to prevent damage by hydrogen.
Description
본 발명은 반도체 메모리 소자 제조 방법에 관한 것으로, 특히 수소 확산에 의한 강유전체 특성 저하를 방지할 수 있는 강유전체 메모리 소자 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor memory device, and more particularly, to a method of manufacturing a ferroelectric memory device capable of preventing a decrease in ferroelectric properties due to hydrogen diffusion.
반도체 메모리 소자에서 강유전체(ferroelectric) 재료를 캐패시터에 사용함으로써 기존 DRAM(Dynamic Random Access Memory) 소자에서 필요한 리프레쉬(refresh)의 한계를 극복하고 대용량의 메모리를 이용할 수 있는 소자의 개발이 진행되어왔다. FeRAM(ferroelectric random access memory) 소자는 비휘발성 메모리 소자의 일종으로 전원이 끊어진 상태에서도 저장 정보를 기억하는 장점이 있을 뿐만 아니라 동작 속도도 기존의 DRAM에 필적하여 차세대 기억소자로 각광받고 있다.By using a ferroelectric material in a capacitor in a semiconductor memory device, development of a device capable of using a large-capacity memory while overcoming the limitation of refresh required in a conventional dynamic random access memory (DRAM) device has been in progress. A ferroelectric random access memory (FeRAM) device is a nonvolatile memory device that not only stores stored information even when a power supply is cut off, but also has an operation speed comparable to that of a conventional DRAM.
FeRAM 소자의 축전물질로는 SrBi2Ta2O9(이하 SBT)와 Pb(Zr,Ti)O3(이하 PZT) 박막이 주로 사용된다. 강유전체는 상온에서 유전상수가 수백에서 수천에 이르며 두 개의 안정한 잔류분극(remnant polarization) 상태를 갖고 있어 이를 박막화하여 비휘발성(nonvolatile) 메모리 소자로의 응용이 실현되고 있다. 강유전체 박막을 이용하는 비휘발성 메모리 소자는, 가해주는 전기장의 방향으로 분극의 방향을 조절하여 신호를 입력하고 전기장을 제거하였을 때 남아있는 잔류분극의 방향에 의해 디지털 신호 1과 0을 저장하는 원리를 이용한다.As the storage material of the FeRAM device, SrBi 2 Ta 2 O 9 (hereinafter referred to as SBT) and Pb (Zr, Ti) O 3 (hereinafter referred to as PZT) thin films are mainly used. Ferroelectrics have dielectric constants ranging from hundreds to thousands at room temperature, and have two stable remnant polarization states, making them thinner and enabling their application to nonvolatile memory devices. Nonvolatile memory devices using a ferroelectric thin film use the principle of inputting a signal by adjusting the direction of polarization in the direction of an applied electric field and storing digital signals 1 and 0 by the direction of residual polarization remaining when the electric field is removed. .
FeRAM 소자에서 캐패시터의 강유전체 재료로서 PZT, SBT, SrxBiy(TaiNbj)2O9(이하 SBTN) 등의 페롭스카이트(perovskite) 구조를 갖는 강유전체를 사용하는 경우 통상적으로 Pt, Ir, Ru, Pt 합금 등의 금속으로 상부전극을 형성한다.As the ferroelectric material of the capacitor in the FeRAM element PZT, SBT, Sr x Bi y (Ta i Nb j) 2 O 9 in the conventional case of using a ferroelectric having a perovskite (perovskite) structure, such as (the SBTN) Pt, Ir The upper electrode is formed of a metal such as Ru, Pt alloy, or the like.
FeRAM 소자 제조시 절연막 형성 공정은 크게 층간절연막(inter-layerdielectric), 금속배선간 절연막(inter-metal dielectric) 및 페시베이션(passivation)막 형성 공정으로 대별된다.In the FeRAM device fabrication, an insulation film forming process is roughly classified into an inter-layer dielectric, an inter-metal dielectric, and a passivation film formation process.
이러한 절연막 형성 공정은 통상적으로 실란(silane, SiH4)과 같은 수소를 포함한 원료가스와 플라즈마를 사용하기 때문에 수소 원자, 이온 및 분자를 쉽게 발생시켜 이들이 강유전체로 확산하여 강유전체의 특성을 저하시키는 손상(hydrogen damage)을 유발한다.Since the insulating film forming process typically uses a source gas containing hydrogen such as silane (SiH 4 ) and a plasma, it is easy to generate hydrogen atoms, ions, and molecules, and diffuse them into the ferroelectric to deteriorate the characteristics of the ferroelectric. cause hydrogen damage.
이러한 문제점을 해결하기 위해서는 수소에 의한 손상을 유발하지 않는 절연막을 형성하는 제1 방법, 절연막 형성 후 600 ℃ 이상의 산소분위기에서 열처리를 실시하는 제2 방법 또는 절연막 형성 전에 ALD(Atomic Layer Deposition)법으로 Al2O3와 같은 수소확산방지막을 형성하는 제3 방법을 이용할 수 있다.In order to solve this problem, a first method of forming an insulating film that does not cause damage by hydrogen, a second method of performing heat treatment in an oxygen atmosphere at 600 ° C. or higher after the insulating film is formed, or an ALD (Atomic Layer Deposition) method before forming the insulating film. A third method of forming a hydrogen diffusion prevention film such as Al 2 O 3 can be used.
이중 제1 방법은 각각의 절연막 형성 공정에서 요구되는 특성, 예를 들면 층간절연막 및 금속배선간 절연막 형성 공정에서의 평탄화 특성과 페시베이션층에서의 수분 흡수 방지 특성 등을 만족시키면서 동시에 수소에 의한 손상 유발하지 않는 절연막 형성 공정을 개발하기가 현실적으로 어렵다.The first method satisfies the characteristics required in each insulating film formation process, for example, the planarization property in the interlayer insulating film and the inter-metal wiring insulating film forming step and the moisture absorption prevention property in the passivation layer, while simultaneously being damaged by hydrogen. It is practically difficult to develop an insulating film forming process that does not cause.
제2 방법은 하부에 있는 Al 등의 금속배선 때문에 층간절연막 및 금속배선간 절연막 형성 공정에서는 적용할 수 없는 단점이 있다.The second method has a disadvantage in that it cannot be applied in the interlayer insulating film and the intermetallic insulating film forming process because of the metal wiring such as Al in the lower portion.
그리고, 제3 방법을 이용할 경우 Al2O3는 통상적인 SiO2계열의 절연막과 달리 식각이 어렵고, ALD법으로 형성시 증착속도가 5 Å/분 이하로 낮아 생산성이 떨어진다는 단점이 있다.In addition, when using the third method, Al 2 O 3 is difficult to be etched unlike conventional SiO 2 series insulating films, and has a disadvantage in that productivity is reduced due to a deposition rate of 5 μm / min or less when formed by the ALD method.
상기와 같은 문제점을 해결하기 위하여 안출된 본 발명은 금속배선간 절연막 및 페시베이션막 형성시 수소확산에 의한 강유전체 특성 저하를 효과적으로 방지할 수 있는 강유전체 메모리 소자 제조 방법을 제공하는데 그 목적이 있다.Disclosure of Invention The present invention devised to solve the above problems has an object to provide a method of manufacturing a ferroelectric memory device that can effectively prevent deterioration of ferroelectric properties due to hydrogen diffusion when forming an inter-metallic insulating film and a passivation film.
도1 내지 도5는 본 발명의 일실시예에 따른 FeRAM 제조 공정 단면도.1 to 5 are cross-sectional views of a FeRAM manufacturing process according to an embodiment of the present invention.
*도면의 주요 부분에 대한 도면부호의 설명** Description of reference numerals for the main parts of the drawings *
20: 하부전극막 21: 강유전체막20: lower electrode film 21: ferroelectric film
22: 상부전극막 27, 30: Al막22: upper electrode film 27, 30: Al film
23, 28, 31: 산소 플라즈마 처리된 계면23, 28, 31: oxygen plasma treated interface
29: 금속배선간 절연막 32: 페시베이션막29: insulating film between metal wirings 32: passivation film
상기와 같은 목적을 달성하기 위한 본 발명은 트랜지스터 형성이 완료된 반도체 기판 상에 하부전극, 강유전체막 및 상부전극으로 이루어지는 캐패시터를 형성하는 제1 단계; 산소를 이용한 플라즈마 처리를 실시하여 상기 캐패시터를 포함한 전체 구조 상에 산소 원자 및 이온을 잔류시키는 제2 단계; 및 상기 산소원자 및 이온이 잔류하는 전체 구조 상에 제1 층간절연막을 형성하는 제3 단계를 포함하는 것을 특징으로 하는 강유전체 메모리 소자 제조 방법을 제공한다.The present invention for achieving the above object is a first step of forming a capacitor consisting of a lower electrode, a ferroelectric film and an upper electrode on a semiconductor substrate completed transistor formation; Performing a plasma treatment using oxygen to retain oxygen atoms and ions on the entire structure including the capacitor; And a third step of forming a first interlayer insulating film on the entire structure in which the oxygen atoms and ions remain.
상기 제3 단계 후, 상기 캐패시터와 상기 트랜지스터를 연결하는 제1 금속배선을 형성하는 제4 단계; 산소를 이용한 플라즈마 처리를 실시하여 상기 제4 단계가 완료된 전체 구조 상에 산소 원자 및 이온을 잔류시키는 제5 단계; 상기 제5 단계가 완료된 전체 구조 상에 금속배선간 절연막을 형성하는 제6 단계; 상기 제1 금속배선과 연결되는 제2 금속배선을 형성하는 제7 단계; 산소를 이용한 플라즈마 처리를 실시하여 상기 제7 단계가 완료된 전체 구조 상에 산소 원자 및 이온을 잔류시키는 제8 단계; 및 상기 제8 단계가 완료된 전체 구조 상에 페시베이션막을 형성하는 제9 단계를 더 포함한다.A fourth step of forming a first metal wire connecting the capacitor and the transistor after the third step; Performing a plasma treatment using oxygen to leave oxygen atoms and ions on the entire structure where the fourth step is completed; A sixth step of forming an insulating film between metal lines on the entire structure of the fifth step; A seventh step of forming a second metal wire connected to the first metal wire; An eighth step of performing oxygen plasma treatment to leave oxygen atoms and ions on the entire structure where the seventh step is completed; And a ninth step of forming a passivation film on the entire structure in which the eighth step is completed.
본 발명은 층간절연막, 금속배선간 절연막 및 페시베이션막 형성 공정 전에 산소 플라즈마를 이용한 사전 처리를 실시하여 수소에 의한 손상을 방지하는데 그 특징이 있다.The present invention is characterized in that pretreatment using oxygen plasma is performed before the interlayer insulating film, the intermetallic insulating film and the passivation film forming process to prevent damage by hydrogen.
수소에 의한 강유전체 특성 저하는 수소 원자 및 이온이 강유전체 내부로 확산하여 강유전체를 구성하고 있는 산소와 결합해서 H2O 분자를 형성함에 기인한 것으로 알려져 있다. PZT의 경우 강유전체 내부에 확산된 수소가 산소와 결합해서 H2O 분자를 형성하고 결과적으로 O-Ti-O 결합의 비대칭 스트레칭(antisymmetry stretching)을 유발하여 강유전 특성 저하가 일어난다고 알려져 있다.It is known that the degradation of ferroelectric properties due to hydrogen is caused by hydrogen atoms and ions diffused into the ferroelectric and combined with oxygen constituting the ferroelectric to form H 2 O molecules. In the case of PZT, hydrogen diffused inside the ferroelectric combines with oxygen to form H 2 O molecules, resulting in asymmetric stretching of O-Ti-O bonds, thereby degrading ferroelectric properties.
본 발명은 층간절연막, 금속배선간 절연막 및 페시베이션막 형성 전에 산소 플라즈마 처리를 실시하여 하부층 상에 산소 원자 및 이온을 형성한 상태에서 층간절연막, 금속배선간 절연막 및 페시베이션막을 형성한다. 이에 따라 하부층 상에 형성된 산소 원자 및 이온이 강유전체로 확산하여 들어가는 수소 원자 및 이온과 반응하여 H2O 분자 또는 -OH 결합을 형성하여 손상을 유발하는 수소 원자 및 이온을 강유전체에 도달하기 전에 소모시킨다.The present invention forms an interlayer insulating film, an intermetallic insulating film, and a passivation film in the state where oxygen atoms and ions are formed on the lower layer by performing oxygen plasma treatment before forming the interlayer insulating film, the intermetallic insulating film, and the passivation film. Accordingly, oxygen atoms and ions formed on the lower layer react with the hydrogen atoms and ions diffused into the ferroelectric to form H 2 O molecules or -OH bonds to consume the hydrogen atoms and ions causing damage before reaching the ferroelectric. .
이와 같은 수소 확산 방지법은 종래의 방법과 비교할 때 다음과 같은 장점을 갖는다. 즉, 층간절연막, 금속배선간 절연막 및 페시베이션막 형성 공정에서 수소 손상을 고려함으로써 발생하는 공정의 제약을 해소할 수 있다. 또한, 600 ℃ 이상의 고온 산소 분위기에서 실시하는 회복 열처리 방법과는 달리 300 ℃ 이하의 저온 공정이 가능하므로 층간절연막 형성 공정에서 뿐만 아니라 하부에 Al 등의 금속배선층이 있는 금속배선간 절연막 및 페시베이션막 형성 공정 에도 적용할 수 있다. 그리고, Al2O3를 형성하는 경우와 같이 어려운 후속 식각 공정의 진행을 필요로하지 않는다.This hydrogen diffusion prevention method has the following advantages compared to the conventional method. In other words, it is possible to remove the limitation of the process generated by considering the hydrogen damage in the interlayer insulating film, the intermetallic insulating film, and the passivation film forming step. In addition, unlike a recovery heat treatment method performed in a high temperature oxygen atmosphere of 600 ° C. or higher, a low temperature process of 300 ° C. or lower is possible. It is also applicable to the forming process. In addition, it is not necessary to proceed with a difficult subsequent etching process as in the case of forming Al 2 O 3 .
이하, 첨부된 도면 도1 내지 도5를 참조하여 본 발명의 일실시예에 따른 FeRAM 소자 제조 방법을 상세히 설명한다.Hereinafter, a method of fabricating a FeRAM device according to an embodiment of the present invention will be described in detail with reference to FIGS. 1 to 5.
먼저, 도1에 도시한 바와 같이 반도체 기판(10) 상에 형성된 게이트 절연막(12), 게이트 전극(13) 및 소오스·드레인(14)으로 이루어지는 트랜지스터 형성이 완료된 반도체 기판(10) 상부에 BPSG 등으로 제1 층간절연막(15)을 형성하고, 상기 제1 층간절연막(15) 내에 형성된 콘택홀을 통하여 상기 트랜지스터의 소오스·드레인(14)과 연결되는 비트라인(16)을 형성한다. 이어서, 비트라인(16) 형성이 완료된 전체 구조 상에 제2 층간절연막(17)을 형성하고, 제2 층간절연막(17) 상에 고온 산화막(high temperature oxide, HTO) 등으로 페시베이션 산화막(passivation oxide)(18)을 형성한다. 도면에서 도면부호 '11'은 필드 산화막을 나타낸다.First, as shown in FIG. 1, a BPSG or the like is formed on the semiconductor substrate 10 on which the transistors formed of the gate insulating film 12, the gate electrode 13, and the source and drain 14 formed on the semiconductor substrate 10 are completed. As a result, a first interlayer insulating film 15 is formed, and a bit line 16 connected to the source and drain 14 of the transistor is formed through a contact hole formed in the first interlayer insulating film 15. Subsequently, a second interlayer insulating film 17 is formed on the entire structure where the bit line 16 is formed, and a passivation oxide film (passivation) is performed on the second interlayer insulating film 17 by a high temperature oxide (HTO) or the like. oxide) 18. In the drawing, reference numeral 11 denotes a field oxide film.
다음으로, 도2에 도시한 바와 같이 페시베이션 산화막(18) 상에 TiOx, Ti 등으로 접착층(adhesion layer)(19)을 형성하고, 접착층(19) 상에 Pt, Ir, Ru, Pt 합금, 단일산화물(RuO2, IrO2, (La,Sr)CoO3등) 또는 이들 금속과 산화물의 복합재료 등으로 하부전극막(20)을 형성한다.Next, as shown in FIG. 2, an adhesion layer 19 is formed on the passivation oxide film 18 by TiO x , Ti, or the like, and Pt, Ir, Ru, Pt alloy is formed on the adhesion layer 19. , The lower electrode film 20 is formed of a single oxide (RuO 2 , IrO 2 , (La, Sr) CoO 3, etc.) or a composite material of these metals and oxides.
이어서, 하부전극막(20) 상에 PbTiO3, (Pb, La)TiO3등의 페롭스카이트(perovskite) 또는 SrBi2Ta2O9, SrBi2(Ta,Nb)2O9등과 같은 Bi-레이어드(Bi-layered) 페롭스카이트 구조의 강유전체막(21)을 형성한다. 이어서, 강유전체막(21) 상에 Pt, Ir, Ru, Pt 합금, 단일산화물(RuO2, IrO2, (La,Sr)CoO3등) 또는 이들 금속과 산화물의 복합재료 등으로 상부전극막(22)을 형성한다.Next, PbTiO on the lower electrode film 203, (Pb, La) TiO3Perovskite or SrBi2Ta2O9, SrBi2(Ta, Nb)2O9A ferroelectric film 21 having a Bi-layered perovskite structure is formed. Subsequently, Pt, Ir, Ru, Pt alloy, and single oxide (RuO) were formed on the ferroelectric film 21.2, IrO2, (La, Sr) CoO3Etc.) or a composite material of these metals and oxides The upper electrode film 22 is formed.
다음으로, 마스크 공정 및 식각 공정 등으로 상부전극막(22), 강유전체막(21), 하부전극막(20)을 패터닝하여 캐패시터 패턴을 형성한다.Next, the capacitor pattern is formed by patterning the upper electrode film 22, the ferroelectric film 21, and the lower electrode film 20 by a mask process and an etching process.
다음으로, 도3에 도시한 바와 같이 이후 제3층간절연막 형성시 발생하는 수소에 의한 강유전체 특성 저하를 방지하기 위하여 산소 플라즈마 처리를 실시하고, 전체 구조 상에 USG(undoped silicate glass) SiO2또는 BPSG(borophospho silicate glass)로 이루어지는 제3 층간절연막(24)을 형성한다.Next, as shown in FIG. 3, an oxygen plasma treatment is performed to prevent degradation of ferroelectric properties due to hydrogen generated when the third interlayer insulating film is formed, and USG (undoped silicate glass) SiO 2 or BPSG is formed on the entire structure. A third interlayer insulating film 24 made of borophospho silicate glass is formed.
이어서, 제3 층간절연막(24)을 선택적으로 식각하여 상부전극막(22)을 노출시키는 콘택홀을 형성하고, 이후의 금속 배선 및 확산방지막 형성 공정시 캐패시터의 특성이 저하되는 것을 방지하기 위하여 TiN 등으로 전체 구조 상에 제1 확산방지막(25)을 형성한다.Subsequently, the third interlayer insulating film 24 is selectively etched to form a contact hole exposing the upper electrode film 22, and to prevent the deterioration of the characteristics of the capacitor during the subsequent metallization and diffusion barrier formation process. The first diffusion barrier 25 is formed over the entire structure.
다음으로, 제1 확산방지막(25), 제3 층간절연막(24), 페시베이션 산화막(18), 제2 층간절연막(17) 및 제1 층간절연막(15)을 선택적으로 식각하여 반도체기판(10)에 형성된 소오스·드레인(14)을 노출시키는 콘택홀을 형성하고, 제1 확산방지막(25)을 패터닝하여 상부전극막(22)과 접하는 제1 확산방지막(25) 패턴을 형성한다. 도3에서 도면부호 '23'은 산소 플라즈마 처리된 계면을 나타낸다.Next, the first diffusion barrier 25, the third interlayer insulating film 24, the passivation oxide film 18, the second interlayer insulating film 17, and the first interlayer insulating film 15 are selectively etched to form the semiconductor substrate 10. A contact hole is formed to expose the source and drain 14 formed in the C), and the first diffusion barrier layer 25 is patterned to form a first diffusion barrier layer 25 in contact with the upper electrode layer 22. In FIG. 3, reference numeral 23 denotes an interface subjected to oxygen plasma treatment.
다음으로, 도4에 도시한 바와 같이 캐패시터와 트랜지스터를 연결하는 금속배선(metallization)을 위하여 TiN/Ti 등의 적층구조로 이루어지는 제2 확산방지막(26)을 형성하고, Al막(27) 등의 금속막을 증착한 다음, Al막(27) 및 제2 확산방지막(26)을 패터닝하여 제1 금속배선을 형성한다.Next, as shown in FIG. 4, a second diffusion barrier 26 having a stacked structure such as TiN / Ti is formed for metallization connecting the capacitor and the transistor, and the Al film 27 or the like is formed. After the deposition of the metal film, the Al film 27 and the second diffusion barrier film 26 are patterned to form a first metal wiring.
다음으로, 도5에 도시한 바와 같이 금속배선간 절연막 형성시 발생하는 수소에 의한 강유전체 특성 저하를 방지하기 위하여 산소 플라즈마 처리를 실시하고, SiON/SOG(spin on glass)/SiOx의 적층 구조, USG 또는 BPSG로 이루어지는 금속배선간 절연막(29)을 형성하고, 제1 금속배선과 제2 금속배선과의 연결을 위한 비아(via) 콘택홀(도시하지 않음)을 형성하고, Al막(30) 등으로 제2 금속배선을 형성한다.Next, as shown in FIG. 5, an oxygen plasma treatment is performed to prevent degradation of the ferroelectric properties caused by hydrogen generated during the formation of the insulating film between metal wirings, and a stacked structure of SiON / SOG (spin on glass) / SiO x , An intermetallic insulating film 29 made of USG or BPSG is formed, a via contact hole (not shown) for connecting the first metal wire and the second metal wire is formed, and the Al film 30 is formed. Or the like to form the second metal wiring.
이후, 페시베이션막 형성 공정에서 발생하는 수소에 의한 강유전체 특성 저하를 방지하기 위하여 산소를 이용한 플라즈마 처리를 실시하고, 전체 구조 상에 Si3N4또는 USG 등으로 페시베이션막(32)을 형성한다.Thereafter, plasma treatment using oxygen is performed to prevent degradation of ferroelectric properties due to hydrogen generated in the passivation film forming process, and the passivation film 32 is formed of Si 3 N 4 or USG on the entire structure. .
도5에서 도면부호 '23', '28' 및 '31'은 산소 플라즈마 처리된 계면을 나타낸다.In FIG. 5, reference numerals '23', '28', and '31' denote an oxygen plasma treated interface.
상기 제3 층간절연막(24), 금속배선간 절연막(29) 및 페시베이션막(32) 형성이전에 실시하는 플라즈마 처리 공정에서 플라즈마에 의한 손상을 감소시키기 위하여, 웨이퍼 표면으로부터 떨어진 곳에서 플라즈마를 발생시켜 산소 이온 및 원자를 형성한 후 웨이퍼 표면으로 플라즈마를 이동시키는 방식 즉, 원격(remote) 산소 플라즈마를 사용한다. 이때, 원격 산소 플라즈마 발생을 위하여 500 W 내지 2000 W의 마이크로 웨이브(microwave) 전력을 인가하며, 플라즈마 처리는 0.1 Torr 내지 10 Torr의 압력, 100 ℃ 내지 300 ℃ 기판 온도에서 1 분 내지 5 분 동안 실시한다.Plasma is generated at a distance from the wafer surface in order to reduce damage caused by plasma in the plasma processing process performed before the formation of the third interlayer insulating film 24, the intermetallic insulating film 29, and the passivation film 32. To form oxygen ions and atoms and then move the plasma to the wafer surface, i.e., a remote oxygen plasma. At this time, a microwave power of 500 W to 2000 W is applied to generate a remote oxygen plasma, and the plasma treatment is performed at a pressure of 0.1 Torr to 10 Torr and a substrate temperature of 100 ° C. to 300 ° C. for 1 minute to 5 minutes. do.
이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.
상기와 같이 이루어지는 본 발명은 FeRAM 소자 제조 공정에서 층간절연막, 금속배선간 절연막 및 페시베이션막 형성 전에 산소를 이용한 플라즈마 처리를 실시함으로써 수소 확산에 의한 강유전체 특성 저하를 효과적으로 방지할 수 있다.The present invention as described above can effectively prevent the ferroelectric property deterioration due to hydrogen diffusion by performing plasma treatment using oxygen before the formation of the interlayer insulating film, the inter-metal wiring insulating film and the passivation film in the FeRAM device manufacturing process.
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