KR100260959B1 - 탄탈 산화물 콘트롤 게이트 유전체를 사용한 자기 정합 스택드 게이트 eprom 셀 - Google Patents

탄탈 산화물 콘트롤 게이트 유전체를 사용한 자기 정합 스택드 게이트 eprom 셀 Download PDF

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KR100260959B1
KR100260959B1 KR1019920014909A KR920014909A KR100260959B1 KR 100260959 B1 KR100260959 B1 KR 100260959B1 KR 1019920014909 A KR1019920014909 A KR 1019920014909A KR 920014909 A KR920014909 A KR 920014909A KR 100260959 B1 KR100260959 B1 KR 100260959B1
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South Korea
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poly
cell array
oxide
ono
forming
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English (en)
Korean (ko)
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윤유식
엠. 버지몬트 알버트
에프. 코박스 로날드
Original Assignee
클라크 3세 존 엠.
내셔널 세미콘덕터 코포레이션
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/44—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a control gate layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/665—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1019920014909A 1991-08-20 1992-08-19 탄탈 산화물 콘트롤 게이트 유전체를 사용한 자기 정합 스택드 게이트 eprom 셀 Expired - Lifetime KR100260959B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US74766391A 1991-08-20 1991-08-20
US91-747,663 1991-08-20

Publications (1)

Publication Number Publication Date
KR100260959B1 true KR100260959B1 (ko) 2000-07-01

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KR1019920014909A Expired - Lifetime KR100260959B1 (ko) 1991-08-20 1992-08-19 탄탈 산화물 콘트롤 게이트 유전체를 사용한 자기 정합 스택드 게이트 eprom 셀

Country Status (4)

Country Link
US (1) US5304503A (enrdf_load_stackoverflow)
EP (1) EP0528564A2 (enrdf_load_stackoverflow)
JP (1) JP3065804B2 (enrdf_load_stackoverflow)
KR (1) KR100260959B1 (enrdf_load_stackoverflow)

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KR100487557B1 (ko) * 2002-06-24 2005-05-03 주식회사 대일시스템 칩사이즈 프로브카드

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KR960009995B1 (ko) * 1992-07-31 1996-07-25 삼성전자 주식회사 반도체 장치의 제조 방법 및 그 구조
US5460988A (en) * 1994-04-25 1995-10-24 United Microelectronics Corporation Process for high density flash EPROM cell
JP2901493B2 (ja) * 1994-06-27 1999-06-07 日本電気株式会社 半導体記憶装置及びその製造方法
JP3383140B2 (ja) 1995-10-02 2003-03-04 株式会社東芝 不揮発性半導体記憶装置の製造方法
TW428319B (en) * 1996-05-31 2001-04-01 United Microelectronics Corp High-density contactless flash memory on silicon above an insulator and its manufacturing method
JP3107199B2 (ja) 1996-08-29 2000-11-06 日本電気株式会社 不揮発性半導体記憶装置の製造方法
US5985724A (en) * 1996-10-01 1999-11-16 Advanced Micro Devices, Inc. Method for forming asymmetrical p-channel transistor having nitrided oxide patterned to selectively form a sidewall spacer
US5768186A (en) 1996-10-25 1998-06-16 Ma; Yueh Yale High density single poly metal-gate non-volatile memory cell
JP3442596B2 (ja) * 1996-11-28 2003-09-02 富士通株式会社 半導体装置の製造方法
JPH10189777A (ja) * 1996-12-26 1998-07-21 Toshiba Corp 不揮発性半導体記憶装置の製造方法
US5889303A (en) * 1997-04-07 1999-03-30 Motorola, Inc. Split-Control gate electrically erasable programmable read only memory (EEPROM) cell
US5953599A (en) * 1997-06-12 1999-09-14 National Semiconductor Corporation Method for forming low-voltage CMOS transistors with a thin layer of gate oxide and high-voltage CMOS transistors with a thick layer of gate oxide
US6483157B1 (en) 1997-06-20 2002-11-19 Advanced Micro Devices, Inc. Asymmetrical transistor having a barrier-incorporated gate oxide and a graded implant only in the drain-side junction area
US6265749B1 (en) 1997-10-14 2001-07-24 Advanced Micro Devices, Inc. Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant
US5899713A (en) * 1997-10-28 1999-05-04 International Business Machines Corporation Method of making NVRAM cell with planar control gate
TW370723B (en) * 1997-11-27 1999-09-21 United Microelectronics Corp Method for reducing current leakage of high capacitivity materials
US5990493A (en) * 1998-05-14 1999-11-23 Advanced Micro Devices, Inc. Diamond etch stop rendered conductive by a gas cluster ion beam implant of titanium
US6124620A (en) * 1998-05-14 2000-09-26 Advanced Micro Devices, Inc. Incorporating barrier atoms into a gate dielectric using gas cluster ion beam implantation
US6072222A (en) * 1998-05-18 2000-06-06 Advanced Micro Devices, Inc. Silicon implantation into selective areas of a refractory metal to reduce consumption of silicon-based junctions during salicide formation
US5907780A (en) * 1998-06-17 1999-05-25 Advanced Micro Devices, Inc. Incorporating silicon atoms into a metal oxide gate dielectric using gas cluster ion beam implantation
US6274442B1 (en) 1998-07-15 2001-08-14 Advanced Micro Devices, Inc. Transistor having a nitrogen incorporated epitaxially grown gate dielectric and method of making same
JP2001168303A (ja) * 1998-08-27 2001-06-22 Stmicroelectronics Srl 電子仮想接地メモリ・デバイスおよびその製造方法
US6194768B1 (en) 1998-10-23 2001-02-27 Advanced Micro Devices, Inc. High dielectric constant gate dielectric with an overlying tantalum gate conductor formed on a sidewall surface of a sacrificial structure
US6171900B1 (en) 1999-04-15 2001-01-09 Taiwan Semiconductor Manufacturing Company CVD Ta2O5/oxynitride stacked gate insulator with TiN gate electrode for sub-quarter micron MOSFET
US6288419B1 (en) 1999-07-09 2001-09-11 Micron Technology, Inc. Low resistance gate flash memory
US6190979B1 (en) 1999-07-12 2001-02-20 International Business Machines Corporation Method for fabricating dual workfunction devices on a semiconductor substrate using counter-doping and gapfill
US6218227B1 (en) * 1999-10-25 2001-04-17 Advanced Micro Devices, Inc. Method to generate a MONOS type flash cell using polycrystalline silicon as an ONO top layer
KR100351450B1 (ko) * 1999-12-30 2002-09-09 주식회사 하이닉스반도체 비휘발성 메모리 소자 및 그 제조방법
KR20010066386A (ko) * 1999-12-31 2001-07-11 박종섭 플래시 메모리의 게이트전극 제조방법
US6440870B1 (en) 2000-07-12 2002-08-27 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
JP3597495B2 (ja) 2001-08-31 2004-12-08 株式会社ルネサステクノロジ 半導体集積回路装置
US6429109B1 (en) 2001-12-14 2002-08-06 Chartered Semiconductor Manufacturing Ltd Method to form high k dielectric and silicide to reduce poly depletion by using a sacrificial metal between oxide and gate
US7071538B1 (en) * 2004-12-10 2006-07-04 Spansion,Llc One stack with steam oxide for charge retention
US9129996B2 (en) * 2013-07-31 2015-09-08 Freescale Semiconductor, Inc. Non-volatile memory (NVM) cell and high-K and metal gate transistor integration

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US4698787A (en) * 1984-11-21 1987-10-06 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
US5156990A (en) * 1986-07-23 1992-10-20 Texas Instruments Incorporated Floating-gate memory cell with tailored doping profile
US4794565A (en) * 1986-09-15 1988-12-27 The Regents Of The University Of California Electrically programmable memory device employing source side injection
US5021848A (en) * 1990-03-13 1991-06-04 Chiu Te Long Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof
US5225359A (en) * 1990-08-17 1993-07-06 National Semiconductor Corporation Method of fabricating Schottky barrier diodes and Schottky barrier diode-clamped transistors
US5120670A (en) * 1991-04-18 1992-06-09 National Semiconductor Corporation Thermal process for implementing the planarization inherent to stacked etch in virtual ground EPROM memories
US5240870A (en) * 1991-04-18 1993-08-31 National Semiconductor Corporation Stacked gate process flow for cross-point EPROM with internal access transistor

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Publication number Priority date Publication date Assignee Title
KR100487557B1 (ko) * 2002-06-24 2005-05-03 주식회사 대일시스템 칩사이즈 프로브카드

Also Published As

Publication number Publication date
JP3065804B2 (ja) 2000-07-17
EP0528564A2 (en) 1993-02-24
EP0528564A3 (enrdf_load_stackoverflow) 1995-03-08
JPH05235366A (ja) 1993-09-10
US5304503A (en) 1994-04-19

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