KR100237030B1 - Method of forming an element field oxide film in a semiconductor device - Google Patents

Method of forming an element field oxide film in a semiconductor device Download PDF

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KR100237030B1
KR100237030B1 KR1019960074948A KR19960074948A KR100237030B1 KR 100237030 B1 KR100237030 B1 KR 100237030B1 KR 1019960074948 A KR1019960074948 A KR 1019960074948A KR 19960074948 A KR19960074948 A KR 19960074948A KR 100237030 B1 KR100237030 B1 KR 100237030B1
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oxide film
forming
field oxide
silicon substrate
semiconductor device
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KR1019960074948A
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Korean (ko)
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KR19980055712A (en
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이창진
홍병섭
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김영환
현대전자산업주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
    • H01L21/02326—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen into a nitride layer, e.g. changing SiN to SiON

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

본 발명은 반도체 소자의 필드산화막 형성 방법에 관한 것으로, 버즈빅의 생성을 최소화시키기 위하여 실리콘 기판과 패드 산화막의 계면에 산화질화막을 형성하므로써 버즈빅의 생성이 억제되어 활성영역의 감소가 방지되고 소자의 신뢰성이 향상될 수 있도록 한 반도체 소자의 필드산화막 형성 방법에 관한 것이다.The present invention relates to a method for forming a field oxide film of a semiconductor device, by forming an oxynitride film at an interface between a silicon substrate and a pad oxide film in order to minimize the generation of the buzz beak, the production of the buzz be suppressed to prevent the reduction of the active area and The field oxide film forming method of a semiconductor device to improve the reliability of the.

Description

반도체 소자의 필드산화막 형성 방법Field oxide film formation method of a semiconductor device

본 발명은 반도체 소자의 필드산화막 형성 방법에 관한 것으로, 특히 버즈빅(Bird's Beak)의 생성을 최소화시킬 수 있도록 한 반도체 소자의 필드산화막 형성 방법에 관한 것이다.The present invention relates to a method of forming a field oxide film of a semiconductor device, and more particularly, to a method of forming a field oxide film of a semiconductor device to minimize generation of Bird's Beak.

일반적으로 반도체 소자의 제조 공정에서 소자와 소자 또는 주변 지역과 메모리 셀 지역을 전기적으로 분리시키기 위하여 소자분리 영역에 필드산화막을 형성한다. 이러한 필드산화막은 LOCOS(Local Oxidation of Silicon) 또는 PBLOCOS(Poly Buffered LOCOS) 공정에 의해 형성되는데, 그러면 PBLOCOS 공정을 이용한 종래 반도체 소자의 필드산화막 형성 방법을 제1(a)도 내지 제1(c)도를 통해 설명하면 다음과 같다.In general, in the manufacturing process of a semiconductor device, a field oxide film is formed in a device isolation region in order to electrically separate a device and a device, or a peripheral region and a memory cell region. The field oxide film is formed by a Local Oxidation of Silicon (LOCOS) or Poly Buffered LOCOS (PBLOCOS) process. Then, a method of forming a field oxide film of a conventional semiconductor device using the PBLOCOS process is shown in FIGS. 1 (a) to 1 (c). When described with reference to the following.

종래에는 제1(a)도에 도시된 바와 같이 실리콘 기판(1)상에 패드 산화막(2), 폴리실리콘층(3) 및 질화막(4)을 순차적으로 형성한 후 제1(b)도에 도시된 바와 같이 소자분리 영역의 상기 실리콘 기판(1)이 노출되도록 상기 질화막(4), 폴리실리콘층(3) 및 패드 산화막(2)을 순차적으로 패터닝한다. 그리고 패터닝된 상기 질화막(4)을 산화 방지층으로 이용한 산화 공정을 실시하여 노출된 부분의 상기 실리콘 기판(1)에 제1(c)도에 도시된 바와 같이 필드산화막(5)을 형성한다. 그런데 상기와 같이 이루어지는 PBLOCOS 공정은 산화 공정시 산화제의 측면확산으로 인해 상기 필드 산화막(5) 양측부에 버즈빅(A 부분)이 생성되기 때문에 활성 영역의 크기가 감소된다. 더욱이 상기 PBLOCOS 공정은 폴리실리콘층을 사용하기 때문에 버즈빅이 이중으로 형성되며, 따라서 고집적 소자의 제조에 상기 PBLOCOS공정을 더 이상 적용하기 어려운 실정이다.Conventionally, as shown in FIG. 1 (a), the pad oxide film 2, the polysilicon layer 3, and the nitride film 4 are sequentially formed on the silicon substrate 1, and then in FIG. 1 (b). As illustrated, the nitride film 4, the polysilicon layer 3, and the pad oxide film 2 are sequentially patterned to expose the silicon substrate 1 in the device isolation region. Then, an oxidation process using the patterned nitride film 4 as an oxidation prevention layer is performed to form the field oxide film 5 on the exposed silicon substrate 1 as shown in FIG. 1 (c). However, in the PBLOCOS process as described above, the size of the active region is reduced because Buzz Big (part A) is formed at both sides of the field oxide film 5 due to side diffusion of the oxidant during the oxidation process. Furthermore, since the PBLOCOS process uses a polysilicon layer, it is difficult to apply the PBLOCOS process to the production of highly integrated devices.

따라서 본 발명은 실리콘 기판과 패드 산화막의 계면에 산화질화막을 형성하므로써 상기한 단점을 해소할 수 있는 반도체 소자의 필드산화막 형성 방법을 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming a field oxide film of a semiconductor device which can solve the above disadvantages by forming an oxynitride film at an interface between a silicon substrate and a pad oxide film.

상기한 목적을 달성하기 위한 본 발명은 NH3가스가 공급되는 분위기하에서 실리콘 기판의 표면을 열처리하는 제 1 단계와, 상기 제 1 단계로부터 상기 실리콘 기판상에 패드산화막이 형성되는 동시에 상기 실리콘 기판과 상기 패드 산화막의 계면에 산화질화막이 형성되도록 산화 공정을 실시하는 제 2 단계와, 상기 제 2 단계로부터 상기 패드산화막상에 산화방지층을 형성한 후 소자분리 영역의 상기 실리콘 기판이 노출되도록 상기 산화방지층, 패드 산화막 및 산화질화막을 순차적으로 패터닝하는 제 3 단계와, 상기 제 3 단계로부터 산화 공정을 실시하여 노출된 부분의 상기 실리콘 기판에 필드산화막을 형성한 후 상기 산화방지층을 제거하는 제 4 단계로 이루어지는 것을 특징으로 하며, 상기 NH3가스의 공급량은 1500 내지 2500CC이고, 상기 제 1 단계의 열처리는 760 내지 780℃의 온도 및 3 내지 5 Torr의 압력 조건하에서 30 내지 60 분동안 실시되는 것을 특징으로 한다. 또한 상기 제 2 단계의 산화 공정은 건식으로 실시되며, 상기 패드 산화막은 40 내지 50 Å의 두께로 형성되고, 상기 산화방지층은 질화막 또는 폴리실리콘층 및 질화막이 적층된 막중 어느 하나의 막으로 형성된 것을 특징으로 한다.The present invention for achieving the above object is a first step of heat-treating the surface of the silicon substrate in the atmosphere supplied with NH 3 gas, and from the first step to form a pad oxide film on the silicon substrate and the silicon substrate and A second step of performing an oxidation process to form an oxynitride film at an interface of the pad oxide film, and forming an anti-oxidation layer on the pad oxide film from the second step and then exposing the silicon substrate in the device isolation region to expose the silicon substrate. And a third step of sequentially patterning a pad oxide film and an oxynitride film, and a fourth step of forming a field oxide film on the exposed silicon substrate by performing an oxidation process from the third step and then removing the antioxidant layer. and characterized by comprising, a supply amount of the NH 3 gas is 1500 to 2500CC, the first step Heat treatment is characterized in that it is carried out for 30 to 60 minutes under a pressure condition of 3 to 5 Torr, and the temperature of 760 to 780 ℃. In addition, the oxidation process of the second step is carried out in a dry manner, the pad oxide film is formed to a thickness of 40 to 50 kPa, and the antioxidant layer is formed of any one film of the nitride film or the polysilicon layer and the nitride film laminated film It features.

제1(a)도 내지 제1(c)도는 종래 반도체 소자의 필드산화막 형성 방법을 설명하기 위한 소자의 단면도.1 (a) to 1 (c) are cross-sectional views of a device for explaining a method of forming a field oxide film of a conventional semiconductor device.

제2(a)도 내지 제2(d)도는 본 발명에 따른 반도체 소자의 필드산화막 형성 방법을 설명하기 위한 소자의 단면도.2 (a) to 2 (d) are cross-sectional views of a device for explaining a method of forming a field oxide film of a semiconductor device according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1, 11 : 실리콘 기판 2, 12 : 패드산화막1, 11: silicon substrate 2, 12: pad oxide film

3 : 폴리실리콘층 4 : 질화막3: polysilicon layer 4: nitride film

5, 14 : 필드산화막 12A : 산화질화막5, 14: field oxide film 12A: oxynitride film

13 : 산화방지층13: antioxidant layer

이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

제2(a)도 내지 제2(d)도는 본 발명에 빠른 반도체 소자의 필드산화막 형성 방법을 설명하기 위한 소자의 단면도로서, 제2(a)도는 760 내지 780℃의 온도 및 3 내지 5 Torr의 압력과 1500 내지 2500 CC의 NH3가스가 공급되는 분위기하에서 30 내지 60분동안 실리콘 기판(11)의 표면을 열처리한 후 800 내지 1000℃의 온도에서 건식 산화 공정을 실시하여 상기 실리콘 기판(11)상에 40 내지 50 Å 두께의 패드산화막(12)을 형성한 상태의 단면도로서, 열처리된 상기 실리콘 기판(11)과 상기 패드 산화막(12)의 계면에 산화질화막(12A)이 형성된다.2 (a) to 2 (d) are cross-sectional views of a device for explaining a method of forming a field oxide film of a fast semiconductor device in accordance with the present invention. FIG. 2 (a) is a temperature of 760 to 780 ° C. and 3 to 5 Torr. Heat-treated the surface of the silicon substrate 11 for 30 to 60 minutes under the pressure of 1,500 to 2500 CC of NH 3 gas and then performing a dry oxidation process at a temperature of 800 to 1000 ° C. Is a cross-sectional view of the pad oxide film 12 having a thickness of 40 to 50 kHz on the surface of the wafer), and an oxynitride film 12A is formed at the interface between the heat treated silicon substrate 11 and the pad oxide film 12.

제2(b)도는 상기 산화막(12)상에 산화방지층(13)을 형성한 상태의 단면도로서, 상기 산화방지층(13)은 질화막으로 형성하거나 폴리실리콘층 및 질화막이 적층된 구조로 형성한다. 이때 상기 질화막은 750 내지 850 ℃의 온도에서 SiH2Cl2및 NH3가스를 이용하여 1200 내지 1400 Å의 두께로 형성하며 상기 폴리실리콘층은 600 내지 650℃의 온도에서 SiH4가스를 이용하여 400 내지 600 Å의 두께로 형성한다.FIG. 2 (b) is a cross-sectional view of the antioxidant layer 13 formed on the oxide film 12, wherein the antioxidant layer 13 is formed of a nitride film or a polysilicon layer and a nitride film laminated. In this case, the nitride film is formed to a thickness of 1200 to 1400 kPa using SiH 2 Cl 2 and NH 3 gas at a temperature of 750 to 850 ℃ and the polysilicon layer 400 using a SiH 4 gas at a temperature of 600 to 650 ℃ To a thickness of 600 kPa.

제2(c)도는 소자분리 영역의 상기 실리콘 기판(11)이 노출되도록 상기 산화방지층(13), 패드 산화막(12) 및 산화질화막(12A)을 순차적으로 패터닝한 상태의 단면도로서, 이후 NH4OH 또는 H2SO4, HF 및 NH4OH(80 내지 85℃)가 혼합된 용액을 이용한 습식 세정 공정을 실시하여 상기 실리콘 기판(11)의 표면을 세정시킬 수 있다.Claim 2 (c) to turn a cross-sectional view of a sequentially patterned in the oxide layer 13, a pad oxide film 12 and the oxy-nitride film (12A) such that the silicon substrate 11 is exposed in the device isolation region state, since the NH 4 The surface of the silicon substrate 11 may be cleaned by performing a wet cleaning process using a solution containing OH or H 2 SO 4 , HF, and NH 4 OH (80 to 85 ° C.).

제2(d)도는 1000 내지 1100℃의 온도에서 산화 공정을 실시하여 노출된 부분의 상기 실리콘 기판(11)에 2500 내지 3000 Å 두께의 필드산화막(14)을 형성한 상태의 단면도로서, 이후 상기 산화방지층(13)을 제거한다. 이때 상기 산화방지층(13)이 질화막과 폴리실리콘층으로 이루어진 경우 상기 질화막은 H3PO4로 제거하며 상기 폴리실리콘층은 플라즈마를 이용한 건식 식각으로 제거한다.FIG. 2 (d) is a cross-sectional view of a state in which a field oxide film 14 having a thickness of 2500 to 3000 Å is formed on the exposed silicon substrate 11 by performing an oxidation process at a temperature of 1000 to 1100 ° C. The antioxidant layer 13 is removed. In this case, when the antioxidant layer 13 is formed of a nitride film and a polysilicon layer, the nitride film is removed by H 3 PO 4 , and the polysilicon layer is removed by dry etching using a plasma.

상술한 바와 같이 본 발명에 의하면 NH3가스 분위기하에서 실리콘 기판의 표면을 열처리한 후 패드 산화막을 형성하며 실리콘 기판과 패드 산화막의 계면에 산화질화막이 형성되도록 하므로써 상기 산화질화막에 의해 버즈빅의 생성이 억제되어 활성영역의 감소가 방지된다. 또한 폴리실리콘층의 사용에 따라 발생되는 실리콘 기판의 피해가 상기 산화질화막에 의해 방지되므로 소자의 신뢰성이 향상될 수 있는 탁월한 효과가 있다.As described above, according to the present invention, after the heat treatment of the surface of the silicon substrate in an NH 3 gas atmosphere, a pad oxide film is formed and an oxynitride film is formed at the interface between the silicon substrate and the pad oxide film. It is suppressed and the reduction of the active area is prevented. In addition, since the damage of the silicon substrate generated by the use of the polysilicon layer is prevented by the oxynitride film, there is an excellent effect that the reliability of the device can be improved.

Claims (8)

반도체 소자의 필드산화막 형성 방법에 있어서, 760 내지 750℃의 온도 및 3 내지 5Toor의 압력조건에서 NH3가스가 공급되는 분위기하에서 30 내지 60분 동안 실리콘 기판의 표면을 열처리하는 제 1 단계와, 상기 실리콘 기판 상에 패드산화막이 형성되는 동시에 상기 실리콘 기판과 패드 산화막 계면에 산화질화막이 형성되도록 산화 공정을 실시하는 제 2 단계와, 상기 패드산화막에 산화방지층을 형성한 후 소자분리 영역의 상기 실리콘 기판이 노출되도록 상기 산화방지층, 패드 산화막 및 산화질화막을 순차적으로 패터닝하는 제 3 단계와, 상기 제 3 단계로부터 산화 공정을 실시하여 노출된 부분의 상기 실리콘 기판에 필드 산화막을 형성한 후 상기 산화방지층을 제거하는 제 4 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.A method of forming a field oxide film of a semiconductor device, comprising: a first step of heat treating a surface of a silicon substrate for 30 to 60 minutes under an atmosphere in which NH 3 gas is supplied at a temperature of 760 to 750 ° C. and a pressure of 3 to 5 Toor, A second step of performing an oxidation process such that a pad oxide film is formed on the silicon substrate and an oxynitride film is formed at the interface between the silicon substrate and the pad oxide film, and an anti-oxidation layer is formed on the pad oxide film, and the silicon substrate in the device isolation region is formed. A third step of sequentially patterning the anti-oxidation layer, the pad oxide film, and the oxynitride film so as to be exposed, and performing an oxidation process from the third step to form a field oxide film on the exposed silicon substrate, and then forming the anti-oxidation layer. A method of forming a field oxide film of a semiconductor device, comprising the fourth step of removing . 제1항에 있어서, 상기 NH3가스의 공급량은 1500 내지 2500CC인 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.The method of forming a field oxide film of a semiconductor device according to claim 1, wherein the supply amount of the NH 3 gas is 1500 to 2500CC. 제1항에 있어서, 상기 제 2 단계의 산화 공정은 건식으로 실시되는 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.The method of forming a field oxide film of a semiconductor device according to claim 1, wherein the oxidation process of the second step is performed dry. 제1항에 있어서, 상기 패드산화막은 40 내지 50Å의 두께로 형성된 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.The method of claim 1, wherein the pad oxide film is formed to a thickness of 40 to 50 GPa. 제1항에 있어서, 상기 산화방지층은 질화막 또는 폴리실리콘층 및 질화막이 적층된 막중 어느 하나의 막으로 형성된 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.The method of claim 1, wherein the anti-oxidation layer is formed of any one of a nitride film, a polysilicon layer, and a film in which a nitride film is stacked. 제1항에 있어서, 상기 제 3 단계 공정으로부터 상기 실리콘 기판의 표면을 세정시키는 단계를 더 포함하는 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.The method of claim 1, further comprising cleaning the surface of the silicon substrate from the third step process. 제7항에 있어서, 상기 세정공정은 NH4OH 또는 H2SO4, HF 및 NH4OH가 혼합된 용액중 어느 하나의 용액을 이용하여 실시되는 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.The method of claim 7, wherein the washing step is NH 4 OH or H 2 SO 4, HF and NH 4 OH is a field oxide film forming a semiconductor device characterized in that is carried out using any of the solution of the mixed solution. 제1항에 있어서, 상기 제 4 단계의의 산화공정은 1000 내지 1100℃의 온도에서 실시되는 것을 특징으로 하는 반도체 소자의 필드산화막 형성 방법.The method of claim 1, wherein the oxidation process of the fourth step is performed at a temperature of 1000 to 1100 ° C.
KR1019960074948A 1996-12-28 1996-12-28 Method of forming an element field oxide film in a semiconductor device KR100237030B1 (en)

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JPH04206824A (en) * 1990-11-30 1992-07-28 Mitsubishi Electric Corp Formation of element isolation region

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* Cited by examiner, † Cited by third party
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JPH04206824A (en) * 1990-11-30 1992-07-28 Mitsubishi Electric Corp Formation of element isolation region

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