KR100214544B1 - 볼 그리드 어레이 반도체 패키지 - Google Patents

볼 그리드 어레이 반도체 패키지 Download PDF

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Publication number
KR100214544B1
KR100214544B1 KR1019960075051A KR19960075051A KR100214544B1 KR 100214544 B1 KR100214544 B1 KR 100214544B1 KR 1019960075051 A KR1019960075051 A KR 1019960075051A KR 19960075051 A KR19960075051 A KR 19960075051A KR 100214544 B1 KR100214544 B1 KR 100214544B1
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KR
South Korea
Prior art keywords
leads
paddle
attached
semiconductor package
grid array
Prior art date
Application number
KR1019960075051A
Other languages
English (en)
Korean (ko)
Other versions
KR19980055815A (ko
Inventor
이주화
Original Assignee
구본준
엘지반도체주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 구본준, 엘지반도체주식회사 filed Critical 구본준
Priority to KR1019960075051A priority Critical patent/KR100214544B1/ko
Priority to CN97112488A priority patent/CN1099131C/zh
Priority to US08/985,959 priority patent/US6201294B1/en
Priority to JP9342393A priority patent/JP2942924B2/ja
Publication of KR19980055815A publication Critical patent/KR19980055815A/ko
Application granted granted Critical
Publication of KR100214544B1 publication Critical patent/KR100214544B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49537Plurality of lead frames mounted in one device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1019960075051A 1996-12-28 1996-12-28 볼 그리드 어레이 반도체 패키지 KR100214544B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019960075051A KR100214544B1 (ko) 1996-12-28 1996-12-28 볼 그리드 어레이 반도체 패키지
CN97112488A CN1099131C (zh) 1996-12-28 1997-06-17 栅阵列球半导体封装
US08/985,959 US6201294B1 (en) 1996-12-28 1997-12-05 Ball grid array semiconductor package comprised of two lead frames
JP9342393A JP2942924B2 (ja) 1996-12-28 1997-12-12 ボールグリッドアレイ半導体パッケージ及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960075051A KR100214544B1 (ko) 1996-12-28 1996-12-28 볼 그리드 어레이 반도체 패키지

Publications (2)

Publication Number Publication Date
KR19980055815A KR19980055815A (ko) 1998-09-25
KR100214544B1 true KR100214544B1 (ko) 1999-08-02

Family

ID=19491763

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960075051A KR100214544B1 (ko) 1996-12-28 1996-12-28 볼 그리드 어레이 반도체 패키지

Country Status (4)

Country Link
US (1) US6201294B1 (zh)
JP (1) JP2942924B2 (zh)
KR (1) KR100214544B1 (zh)
CN (1) CN1099131C (zh)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3685947B2 (ja) * 1999-03-15 2005-08-24 新光電気工業株式会社 半導体装置及びその製造方法
JP3062192B1 (ja) * 1999-09-01 2000-07-10 松下電子工業株式会社 リ―ドフレ―ムとそれを用いた樹脂封止型半導体装置の製造方法
US6483180B1 (en) * 1999-12-23 2002-11-19 National Semiconductor Corporation Lead frame design for burr-free singulation of molded array packages
JP2002118222A (ja) * 2000-10-10 2002-04-19 Rohm Co Ltd 半導体装置
US6933174B1 (en) 2000-11-28 2005-08-23 National Semiconductor Corporation Leadless leadframe package design that provides a greater structural integrity
US6677667B1 (en) 2000-11-28 2004-01-13 National Semiconductor Corporation Leadless leadframe package design that provides a greater structural integrity
US20030178719A1 (en) * 2002-03-22 2003-09-25 Combs Edward G. Enhanced thermal dissipation integrated circuit package and method of manufacturing enhanced thermal dissipation integrated circuit package
SG105544A1 (en) * 2002-04-19 2004-08-27 Micron Technology Inc Ultrathin leadframe bga circuit package
KR20040017625A (ko) * 2002-08-22 2004-02-27 주식회사 칩팩코리아 플립 칩 패키지
US8859339B2 (en) 2008-07-09 2014-10-14 Freescale Semiconductor, Inc. Mold chase
CN102130085B (zh) * 2010-01-18 2013-03-13 矽品精密工业股份有限公司 具电性连接结构的半导体封装件及其制法
US20130249071A1 (en) * 2010-09-07 2013-09-26 Jinzhong Yao Semiconductor device and method of assembling same
JP6357371B2 (ja) * 2014-07-09 2018-07-11 新光電気工業株式会社 リードフレーム、半導体装置及びリードフレームの製造方法
CN105719975B (zh) 2014-08-15 2019-01-08 恩智浦美国有限公司 半导体封装的浮动模制工具

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4801765A (en) * 1986-01-06 1989-01-31 American Telephone And Telegraph Company, At&T Bell Laboratories Electronic component package using multi-level lead frames
US5157480A (en) * 1991-02-06 1992-10-20 Motorola, Inc. Semiconductor device having dual electrical contact sites
KR930006868A (ko) * 1991-09-11 1993-04-22 문정환 반도체 패키지
TW272311B (zh) * 1994-01-12 1996-03-11 At & T Corp
US5578871A (en) * 1994-10-18 1996-11-26 Fierkens; Richard H. J. Integrated circuit package and method of making the same
US5581122A (en) * 1994-10-25 1996-12-03 Industrial Technology Research Institute Packaging assembly with consolidated common voltage connections for integrated circuits
US5541450A (en) * 1994-11-02 1996-07-30 Motorola, Inc. Low-profile ball-grid array semiconductor package
US5594234A (en) * 1994-11-14 1997-01-14 Texas Instruments Incorporated Downset exposed die mount pad leadframe and package
JP3332308B2 (ja) * 1995-11-07 2002-10-07 新光電気工業株式会社 半導体装置及びその製造方法
KR0179803B1 (ko) * 1995-12-29 1999-03-20 문정환 리드노출형 반도체 패키지
KR0179925B1 (ko) * 1996-06-14 1999-03-20 문정환 리드프레임 및 그를 이용한 버텀 리드 반도체 패키지
KR100187715B1 (ko) * 1996-08-19 1999-06-01 윤종용 리드 프레임을 이용한 칩 스케일 패키지 제조 방법
US5825628A (en) * 1996-10-03 1998-10-20 International Business Machines Corporation Electronic package with enhanced pad design

Also Published As

Publication number Publication date
KR19980055815A (ko) 1998-09-25
CN1187029A (zh) 1998-07-08
US6201294B1 (en) 2001-03-13
JP2942924B2 (ja) 1999-08-30
JPH10200013A (ja) 1998-07-31
CN1099131C (zh) 2003-01-15

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