KR0159402B1 - 디지탈 데이타 전송 장치 - Google Patents
디지탈 데이타 전송 장치 Download PDFInfo
- Publication number
- KR0159402B1 KR0159402B1 KR1019950009064A KR19950009064A KR0159402B1 KR 0159402 B1 KR0159402 B1 KR 0159402B1 KR 1019950009064 A KR1019950009064 A KR 1019950009064A KR 19950009064 A KR19950009064 A KR 19950009064A KR 0159402 B1 KR0159402 B1 KR 0159402B1
- Authority
- KR
- South Korea
- Prior art keywords
- logic level
- logic
- level
- data
- gate
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/02—Channels characterised by the type of signal
- H04L5/06—Channels characterised by the type of signal the signals being represented by different frequencies
- H04L5/08—Channels characterised by the type of signal the signals being represented by different frequencies each combination of signals in different channels being represented by a fixed frequency
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Footwear And Its Accessory, Manufacturing Method And Apparatuses (AREA)
- Dc Digital Transmission (AREA)
- Time-Division Multiplex Systems (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950009064A KR0159402B1 (ko) | 1995-04-18 | 1995-04-18 | 디지탈 데이타 전송 장치 |
TW085211543U TW306511U (en) | 1995-04-18 | 1996-01-15 | Washing machine having a detachable washing bucket |
ARP960101149A AR000803A1 (es) | 1995-04-18 | 1996-01-25 | Maquina lavadora. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950009064A KR0159402B1 (ko) | 1995-04-18 | 1995-04-18 | 디지탈 데이타 전송 장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960039734A KR960039734A (ko) | 1996-11-25 |
KR0159402B1 true KR0159402B1 (ko) | 1998-12-01 |
Family
ID=19412400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950009064A KR0159402B1 (ko) | 1995-04-18 | 1995-04-18 | 디지탈 데이타 전송 장치 |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR0159402B1 (zh) |
AR (1) | AR000803A1 (zh) |
TW (1) | TW306511U (zh) |
-
1995
- 1995-04-18 KR KR1019950009064A patent/KR0159402B1/ko not_active IP Right Cessation
-
1996
- 1996-01-15 TW TW085211543U patent/TW306511U/zh unknown
- 1996-01-25 AR ARP960101149A patent/AR000803A1/es unknown
Also Published As
Publication number | Publication date |
---|---|
AR000803A1 (es) | 1997-08-06 |
TW306511U (en) | 1997-05-21 |
KR960039734A (ko) | 1996-11-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4710649A (en) | Transmission-gate structured logic circuits | |
US5852373A (en) | Static-dynamic logic circuit | |
US6970897B2 (en) | Self-timed transmission system and method for processing multiple data sets | |
KR910700566A (ko) | 고속 프리스케일러 | |
KR100282441B1 (ko) | 데이터 전송장치 | |
US6052008A (en) | Generation of true and complement signals in dynamic circuits | |
JPH01284115A (ja) | 論理回路 | |
US6778626B2 (en) | Bi-directional shift-register circuit | |
EP0631391B1 (en) | Decoded counter with error check and self-correction | |
US4417315A (en) | Method and apparatus for incrementing a digital word | |
JPH05303485A (ja) | 2進数に於いて最も端にある「1」ビットの位置検出回路 | |
KR0159402B1 (ko) | 디지탈 데이타 전송 장치 | |
US4768167A (en) | High speed CMOS latch with alternate data storage and test functions | |
US5724249A (en) | System and method for power management in self-resetting CMOS circuitry | |
KR950013116A (ko) | 디지털신호 전송회로 | |
JP3038757B2 (ja) | シフトレジスタ回路 | |
US4020362A (en) | Counter using an inverter and shift registers | |
US5230014A (en) | Self-counting shift register | |
US4399549A (en) | Odd number frequency division with symmetrical output | |
SU1605935A3 (ru) | Способ перекодировани @ -разр дных кодовых слов и устройство дл его осуществлени | |
US4621370A (en) | Binary synchronous count and clear bit-slice module | |
US4009374A (en) | Pseudo-random bidirectional counter | |
US5239499A (en) | Logical circuit that performs multiple logical operations in each stage processing unit | |
KR0169400B1 (ko) | 래치로 구성한 데이터 저장 회로 | |
KR0179780B1 (ko) | 상보형 클럭발생기 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20010730 Year of fee payment: 4 |
|
LAPS | Lapse due to unpaid annual fee |