KR0136534B1 - 반도체 기억 장치 - Google Patents

반도체 기억 장치

Info

Publication number
KR0136534B1
KR0136534B1 KR1019940006829A KR19940006829A KR0136534B1 KR 0136534 B1 KR0136534 B1 KR 0136534B1 KR 1019940006829 A KR1019940006829 A KR 1019940006829A KR 19940006829 A KR19940006829 A KR 19940006829A KR 0136534 B1 KR0136534 B1 KR 0136534B1
Authority
KR
South Korea
Prior art keywords
address
signal
bits
memory device
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019940006829A
Other languages
English (en)
Korean (ko)
Other versions
KR950009707A (ko
Inventor
꼬지 이무라
미끼로 오까다
유끼미네 시마다
Original Assignee
쓰지 하루오
샤프 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 쓰지 하루오, 샤프 가부시끼가이샤 filed Critical 쓰지 하루오
Publication of KR950009707A publication Critical patent/KR950009707A/ko
Application granted granted Critical
Publication of KR0136534B1 publication Critical patent/KR0136534B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Memory System (AREA)
KR1019940006829A 1993-09-09 1994-03-31 반도체 기억 장치 Expired - Fee Related KR0136534B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP93-224739 1993-09-09
JP5224739A JP2965830B2 (ja) 1993-09-09 1993-09-09 半導体記憶装置

Publications (2)

Publication Number Publication Date
KR950009707A KR950009707A (ko) 1995-04-24
KR0136534B1 true KR0136534B1 (ko) 1998-04-29

Family

ID=16818486

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940006829A Expired - Fee Related KR0136534B1 (ko) 1993-09-09 1994-03-31 반도체 기억 장치

Country Status (4)

Country Link
US (1) US5398212A (enExample)
JP (1) JP2965830B2 (enExample)
KR (1) KR0136534B1 (enExample)
TW (1) TW257866B (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2282248B (en) * 1993-09-27 1997-10-15 Advanced Risc Mach Ltd Data memory
DE69525035T2 (de) * 1994-11-09 2002-09-05 Koninklijke Philips Electronics N.V., Eindhoven Verfahren zum testen einer speicheradressen-dekodierschaltung
JP2001176282A (ja) 1999-12-20 2001-06-29 Fujitsu Ltd 半導体記憶装置およびその制御方法
US6948084B1 (en) * 2001-05-17 2005-09-20 Cypress Semiconductor Corporation Method for interfacing a synchronous memory to an asynchronous memory interface and logic of same
US8266405B2 (en) * 2006-12-13 2012-09-11 Cypress Semiconductor Corporation Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock domain
KR100813627B1 (ko) * 2007-01-04 2008-03-14 삼성전자주식회사 멀티-비트 데이터를 저장할 수 있는 플래시 메모리 장치를제어하는 메모리 제어기와 그것을 포함한 메모리 시스템
KR101388339B1 (ko) 2007-08-14 2014-04-22 엘지전자 주식회사 전기오븐
JP5803184B2 (ja) * 2010-11-19 2015-11-04 株式会社リコー 画像投影装置、メモリアクセス方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140452A (en) * 1980-04-01 1981-11-02 Hitachi Ltd Memory protection system
US5042003A (en) * 1988-07-06 1991-08-20 Zenith Data Systems Corporation Memory usage system
JPH07118191B2 (ja) * 1989-07-26 1995-12-18 日本電気株式会社 半導体メモリ装置

Also Published As

Publication number Publication date
JP2965830B2 (ja) 1999-10-18
TW257866B (enExample) 1995-09-21
KR950009707A (ko) 1995-04-24
JPH0778466A (ja) 1995-03-20
US5398212A (en) 1995-03-14

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