JP2965830B2 - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JP2965830B2
JP2965830B2 JP5224739A JP22473993A JP2965830B2 JP 2965830 B2 JP2965830 B2 JP 2965830B2 JP 5224739 A JP5224739 A JP 5224739A JP 22473993 A JP22473993 A JP 22473993A JP 2965830 B2 JP2965830 B2 JP 2965830B2
Authority
JP
Japan
Prior art keywords
address
memory device
semiconductor memory
signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP5224739A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0778466A (ja
Inventor
興司 井村
幹郎 岡田
幸峰 嶋田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Consejo Superior de Investigaciones Cientificas CSIC
Original Assignee
Consejo Superior de Investigaciones Cientificas CSIC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Consejo Superior de Investigaciones Cientificas CSIC filed Critical Consejo Superior de Investigaciones Cientificas CSIC
Priority to JP5224739A priority Critical patent/JP2965830B2/ja
Priority to US08/220,188 priority patent/US5398212A/en
Priority to TW083102830A priority patent/TW257866B/zh
Priority to KR1019940006829A priority patent/KR0136534B1/ko
Publication of JPH0778466A publication Critical patent/JPH0778466A/ja
Application granted granted Critical
Publication of JP2965830B2 publication Critical patent/JP2965830B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Memory System (AREA)
JP5224739A 1993-09-09 1993-09-09 半導体記憶装置 Expired - Fee Related JP2965830B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP5224739A JP2965830B2 (ja) 1993-09-09 1993-09-09 半導体記憶装置
US08/220,188 US5398212A (en) 1993-09-09 1994-03-30 Semiconductor memory device
TW083102830A TW257866B (enExample) 1993-09-09 1994-03-31
KR1019940006829A KR0136534B1 (ko) 1993-09-09 1994-03-31 반도체 기억 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5224739A JP2965830B2 (ja) 1993-09-09 1993-09-09 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPH0778466A JPH0778466A (ja) 1995-03-20
JP2965830B2 true JP2965830B2 (ja) 1999-10-18

Family

ID=16818486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5224739A Expired - Fee Related JP2965830B2 (ja) 1993-09-09 1993-09-09 半導体記憶装置

Country Status (4)

Country Link
US (1) US5398212A (enExample)
JP (1) JP2965830B2 (enExample)
KR (1) KR0136534B1 (enExample)
TW (1) TW257866B (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2282248B (en) * 1993-09-27 1997-10-15 Advanced Risc Mach Ltd Data memory
DE69525035T2 (de) * 1994-11-09 2002-09-05 Koninklijke Philips Electronics N.V., Eindhoven Verfahren zum testen einer speicheradressen-dekodierschaltung
JP2001176282A (ja) 1999-12-20 2001-06-29 Fujitsu Ltd 半導体記憶装置およびその制御方法
US6948084B1 (en) * 2001-05-17 2005-09-20 Cypress Semiconductor Corporation Method for interfacing a synchronous memory to an asynchronous memory interface and logic of same
US8266405B2 (en) * 2006-12-13 2012-09-11 Cypress Semiconductor Corporation Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock domain
KR100813627B1 (ko) * 2007-01-04 2008-03-14 삼성전자주식회사 멀티-비트 데이터를 저장할 수 있는 플래시 메모리 장치를제어하는 메모리 제어기와 그것을 포함한 메모리 시스템
KR101388339B1 (ko) 2007-08-14 2014-04-22 엘지전자 주식회사 전기오븐
JP5803184B2 (ja) * 2010-11-19 2015-11-04 株式会社リコー 画像投影装置、メモリアクセス方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140452A (en) * 1980-04-01 1981-11-02 Hitachi Ltd Memory protection system
US5042003A (en) * 1988-07-06 1991-08-20 Zenith Data Systems Corporation Memory usage system
JPH07118191B2 (ja) * 1989-07-26 1995-12-18 日本電気株式会社 半導体メモリ装置

Also Published As

Publication number Publication date
TW257866B (enExample) 1995-09-21
KR0136534B1 (ko) 1998-04-29
KR950009707A (ko) 1995-04-24
JPH0778466A (ja) 1995-03-20
US5398212A (en) 1995-03-14

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