JPWO2024052952A1 - - Google Patents

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Publication number
JPWO2024052952A1
JPWO2024052952A1 JP2024545282A JP2024545282A JPWO2024052952A1 JP WO2024052952 A1 JPWO2024052952 A1 JP WO2024052952A1 JP 2024545282 A JP2024545282 A JP 2024545282A JP 2024545282 A JP2024545282 A JP 2024545282A JP WO2024052952 A1 JPWO2024052952 A1 JP WO2024052952A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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JP2024545282A
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Japanese (ja)
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JP7793067B2 (ja
JPWO2024052952A5 (https=
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Publication of JPWO2024052952A5 publication Critical patent/JPWO2024052952A5/ja
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Publication of JP7793067B2 publication Critical patent/JP7793067B2/ja
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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/418Insulated-gate bipolar transistors [IGBT] having a drift region having a doping concentration that is higher at the emitter side relative to other parts of the drift region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/051Forming charge compensation regions, e.g. superjunctions
    • H10D62/058Forming charge compensation regions, e.g. superjunctions by using trenches, e.g. implanting into sidewalls of trenches or refilling trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156Drain regions of DMOS transistors
    • H10D62/157Impurity concentrations or distributions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/417Insulated-gate bipolar transistors [IGBT] having a drift region having a doping concentration that is higher at the collector side relative to other parts of the drift region
JP2024545282A 2022-09-05 2022-09-05 半導体装置、半導体装置の制御方法、および半導体装置の製造方法 Active JP7793067B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/033226 WO2024052952A1 (ja) 2022-09-05 2022-09-05 半導体装置、半導体装置の制御方法、および半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JPWO2024052952A1 true JPWO2024052952A1 (https=) 2024-03-14
JPWO2024052952A5 JPWO2024052952A5 (https=) 2024-12-25
JP7793067B2 JP7793067B2 (ja) 2025-12-26

Family

ID=90192347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024545282A Active JP7793067B2 (ja) 2022-09-05 2022-09-05 半導体装置、半導体装置の制御方法、および半導体装置の製造方法

Country Status (4)

Country Link
JP (1) JP7793067B2 (https=)
CN (1) CN119769194A (https=)
DE (1) DE112022007742T5 (https=)
WO (1) WO2024052952A1 (https=)

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000208527A (ja) * 1999-01-11 2000-07-28 Fuji Electric Co Ltd 超接合半導体素子の製造方法および超接合半導体素子
JP2007012858A (ja) * 2005-06-30 2007-01-18 Toshiba Corp 半導体素子及びその製造方法
JP2007300034A (ja) * 2006-05-02 2007-11-15 Toshiba Corp 半導体装置及び半導体装置の製造方法
JP2008294109A (ja) * 2007-05-23 2008-12-04 Toshiba Corp 半導体装置及び半導体装置の製造方法
US20160260799A1 (en) * 2015-03-05 2016-09-08 Infineon Technologies Americas Corp. IGBT Having an Inter-Trench Superjunction Structure
JP2017050423A (ja) * 2015-09-02 2017-03-09 株式会社東芝 半導体装置の製造方法
JP2018041934A (ja) * 2016-09-09 2018-03-15 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
JP2019054169A (ja) * 2017-09-15 2019-04-04 株式会社東芝 半導体装置
CN110212018A (zh) * 2019-05-20 2019-09-06 上海华虹宏力半导体制造有限公司 超结结构及超结器件
CN111200010A (zh) * 2018-11-20 2020-05-26 深圳尚阳通科技有限公司 超结器件及其制造方法
JP2021057552A (ja) * 2019-10-02 2021-04-08 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN112864219A (zh) * 2019-11-12 2021-05-28 南通尚阳通集成电路有限公司 超结器件及其制造方法

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000208527A (ja) * 1999-01-11 2000-07-28 Fuji Electric Co Ltd 超接合半導体素子の製造方法および超接合半導体素子
JP2007012858A (ja) * 2005-06-30 2007-01-18 Toshiba Corp 半導体素子及びその製造方法
JP2007300034A (ja) * 2006-05-02 2007-11-15 Toshiba Corp 半導体装置及び半導体装置の製造方法
JP2008294109A (ja) * 2007-05-23 2008-12-04 Toshiba Corp 半導体装置及び半導体装置の製造方法
US20160260799A1 (en) * 2015-03-05 2016-09-08 Infineon Technologies Americas Corp. IGBT Having an Inter-Trench Superjunction Structure
JP2017050423A (ja) * 2015-09-02 2017-03-09 株式会社東芝 半導体装置の製造方法
JP2018041934A (ja) * 2016-09-09 2018-03-15 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
JP2019054169A (ja) * 2017-09-15 2019-04-04 株式会社東芝 半導体装置
CN111200010A (zh) * 2018-11-20 2020-05-26 深圳尚阳通科技有限公司 超结器件及其制造方法
CN110212018A (zh) * 2019-05-20 2019-09-06 上海华虹宏力半导体制造有限公司 超结结构及超结器件
JP2021057552A (ja) * 2019-10-02 2021-04-08 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN112864219A (zh) * 2019-11-12 2021-05-28 南通尚阳通集成电路有限公司 超结器件及其制造方法

Also Published As

Publication number Publication date
JP7793067B2 (ja) 2025-12-26
WO2024052952A1 (ja) 2024-03-14
CN119769194A (zh) 2025-04-04
DE112022007742T5 (de) 2025-06-18

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