JPWO2023139813A1 - - Google Patents
Info
- Publication number
- JPWO2023139813A1 JPWO2023139813A1 JP2023548930A JP2023548930A JPWO2023139813A1 JP WO2023139813 A1 JPWO2023139813 A1 JP WO2023139813A1 JP 2023548930 A JP2023548930 A JP 2023548930A JP 2023548930 A JP2023548930 A JP 2023548930A JP WO2023139813 A1 JPWO2023139813 A1 JP WO2023139813A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Laser Beam Processing (AREA)
- Thermal Transfer Or Thermal Recording In General (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US202263300787P | 2022-01-19 | 2022-01-19 | |
US63/300,787 | 2022-01-19 | ||
PCT/JP2022/026880 WO2023139813A1 (ja) | 2022-01-19 | 2022-07-06 | 半導体装置及びレーザマーキング方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JPWO2023139813A1 true JPWO2023139813A1 (ja) | 2023-07-27 |
JP7355970B1 JP7355970B1 (ja) | 2023-10-03 |
JPWO2023139813A5 JPWO2023139813A5 (ja) | 2023-12-20 |
Family
ID=87348483
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2023548930A Active JP7355970B1 (ja) | 2022-01-19 | 2022-07-06 | 半導体装置及びレーザマーキング方法 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP7355970B1 (ja) |
CN (1) | CN117425948B (ja) |
WO (1) | WO2023139813A1 (ja) |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0761198A (ja) * | 1993-08-26 | 1995-03-07 | Yoshioka Fujio | レーザによる金属のカラーマーキング方法 |
JP3242632B2 (ja) | 1998-11-25 | 2001-12-25 | 株式会社小松製作所 | レーザビームによる微小ドットマーク形態、そのマーキング方法 |
JP4910100B2 (ja) * | 2006-07-06 | 2012-04-04 | 日本ケミコン株式会社 | 電子部品の金属ケース |
US7615404B2 (en) * | 2006-10-31 | 2009-11-10 | Intel Corporation | High-contrast laser mark on substrate surfaces |
JP2009064824A (ja) * | 2007-09-04 | 2009-03-26 | Toyota Motor Corp | 半導体装置と半導体装置に対するマーキング方法 |
JP4969377B2 (ja) * | 2007-09-11 | 2012-07-04 | ローム株式会社 | 半導体装置 |
CN101789391B (zh) * | 2009-01-23 | 2012-08-22 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
JP5849849B2 (ja) * | 2012-04-25 | 2016-02-03 | 株式会社デンソー | 半導体装置 |
JP2016139642A (ja) * | 2015-01-26 | 2016-08-04 | 株式会社東芝 | 半導体装置 |
DE102016109720B4 (de) * | 2016-05-25 | 2023-06-22 | Infineon Technologies Ag | Verfahren zum Bilden eines Halbleiterbauelements und Halbleiterbauelement |
JP6865044B2 (ja) * | 2017-01-19 | 2021-04-28 | 浜松ホトニクス株式会社 | 検査方法、検査装置、及びマーキング形成方法 |
JP6614470B1 (ja) * | 2018-06-19 | 2019-12-04 | パナソニックIpマネジメント株式会社 | 半導体装置 |
-
2022
- 2022-07-06 CN CN202280039939.1A patent/CN117425948B/zh active Active
- 2022-07-06 WO PCT/JP2022/026880 patent/WO2023139813A1/ja active Application Filing
- 2022-07-06 JP JP2023548930A patent/JP7355970B1/ja active Active
Also Published As
Publication number | Publication date |
---|---|
JP7355970B1 (ja) | 2023-10-03 |
CN117425948A (zh) | 2024-01-19 |
CN117425948B (zh) | 2024-05-28 |
WO2023139813A1 (ja) | 2023-07-27 |
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