JPWO2023008199A1 - - Google Patents

Info

Publication number
JPWO2023008199A1
JPWO2023008199A1 JP2023508605A JP2023508605A JPWO2023008199A1 JP WO2023008199 A1 JPWO2023008199 A1 JP WO2023008199A1 JP 2023508605 A JP2023508605 A JP 2023508605A JP 2023508605 A JP2023508605 A JP 2023508605A JP WO2023008199 A1 JPWO2023008199 A1 JP WO2023008199A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2023508605A
Other languages
Japanese (ja)
Other versions
JP7365529B2 (ja
JPWO2023008199A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2023008199A1 publication Critical patent/JPWO2023008199A1/ja
Publication of JPWO2023008199A5 publication Critical patent/JPWO2023008199A5/ja
Application granted granted Critical
Publication of JP7365529B2 publication Critical patent/JP7365529B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969—Apertured conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09927—Machine readable code, e.g. bar code
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09936—Marks, inscriptions, etc. for information
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0067—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto an inorganic, non-metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/101—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • H10W46/106—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols digital information, e.g. bar codes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/401—Marks applied to devices, e.g. for alignment or identification for identification or tracking
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/607—Located on parts of packages, e.g. on encapsulations or on package substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
JP2023508605A 2021-07-26 2022-07-13 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法 Active JP7365529B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021121334 2021-07-26
JP2021121334 2021-07-26
PCT/JP2022/027589 WO2023008199A1 (ja) 2021-07-26 2022-07-13 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法

Publications (3)

Publication Number Publication Date
JPWO2023008199A1 true JPWO2023008199A1 (https=) 2023-02-02
JPWO2023008199A5 JPWO2023008199A5 (https=) 2023-07-05
JP7365529B2 JP7365529B2 (ja) 2023-10-19

Family

ID=85086767

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023508605A Active JP7365529B2 (ja) 2021-07-26 2022-07-13 接合基板、回路基板及びその製造方法、並びに、個片基板及びその製造方法

Country Status (4)

Country Link
EP (1) EP4373222A4 (https=)
JP (1) JP7365529B2 (https=)
CN (1) CN117813917A (https=)
WO (1) WO2023008199A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026071044A1 (ja) * 2024-09-27 2026-04-02 株式会社Niterra Materials セラミックス回路基板の製造方法及びセラミックス接合体

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042934A (ja) * 2005-08-04 2007-02-15 Juki Corp 多面取り基板の生産履歴管理方法及び多面取り基板
JP2011119660A (ja) * 2009-10-28 2011-06-16 Kyocera Corp 多数個取り配線基板
JP2011165727A (ja) * 2010-02-05 2011-08-25 Mitsubishi Materials Corp パワーモジュール用基板の製造方法およびパワーモジュール用基板の製造中間体
JP2011233648A (ja) * 2010-04-26 2011-11-17 Murata Mfg Co Ltd マーク付き回路基板
JP2016018833A (ja) * 2014-07-07 2016-02-01 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2021048165A (ja) * 2019-09-17 2021-03-25 日立金属株式会社 回路基板の製造方法
WO2021054317A1 (ja) * 2019-09-20 2021-03-25 デンカ株式会社 複合基板及びその製造方法、並びに、回路基板及びその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005210028A (ja) 2004-01-26 2005-08-04 Kyocera Corp 多数個取り配線基板
WO2010070964A1 (ja) * 2008-12-16 2010-06-24 株式会社村田製作所 回路モジュール及びその管理方法
BE1023850B1 (nl) * 2016-06-29 2017-08-14 C-Mac Electromag Bvba Verbeterde elektronische schakeling en substraat met identificatiepatroon voor afzonderlijke elektronische schakelingen en werkwijze voor het produceren daarvan
CN113490654A (zh) 2019-03-01 2021-10-08 电化株式会社 陶瓷生片、陶瓷基板、陶瓷生片的制造方法及陶瓷基板的制造方法
CN114127918A (zh) 2019-07-31 2022-03-01 电化株式会社 陶瓷基板及其制造方法、复合基板及其制造方法以及电路基板及其制造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042934A (ja) * 2005-08-04 2007-02-15 Juki Corp 多面取り基板の生産履歴管理方法及び多面取り基板
JP2011119660A (ja) * 2009-10-28 2011-06-16 Kyocera Corp 多数個取り配線基板
JP2011165727A (ja) * 2010-02-05 2011-08-25 Mitsubishi Materials Corp パワーモジュール用基板の製造方法およびパワーモジュール用基板の製造中間体
JP2011233648A (ja) * 2010-04-26 2011-11-17 Murata Mfg Co Ltd マーク付き回路基板
JP2016018833A (ja) * 2014-07-07 2016-02-01 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2021048165A (ja) * 2019-09-17 2021-03-25 日立金属株式会社 回路基板の製造方法
WO2021054317A1 (ja) * 2019-09-20 2021-03-25 デンカ株式会社 複合基板及びその製造方法、並びに、回路基板及びその製造方法

Also Published As

Publication number Publication date
JP7365529B2 (ja) 2023-10-19
CN117813917A (zh) 2024-04-02
EP4373222A4 (en) 2024-11-27
WO2023008199A1 (ja) 2023-02-02
EP4373222A1 (en) 2024-05-22

Similar Documents

Publication Publication Date Title
BR112023005462A2 (https=)
BR112023012656A2 (https=)
BR112021014123A2 (https=)
BR112023009656A2 (https=)
BR112022009896A2 (https=)
BR112021017747A2 (https=)
BR112022024743A2 (https=)
BR112022026905A2 (https=)
BR112023011738A2 (https=)
BR112023004146A2 (https=)
BR112023006729A2 (https=)
BR102021018859A2 (https=)
BR102021015500A2 (https=)
BR102021007058A2 (https=)
BR102020022030A2 (https=)
JPWO2023008200A1 (https=)
BR112023016292A2 (https=)
BR112023011610A2 (https=)
BR112023011539A2 (https=)
BR112023008976A2 (https=)
BR102021020147A2 (https=)
BR102021018926A2 (https=)
BR102021018167A2 (https=)
BR102021017576A2 (https=)
BR102021016837A2 (https=)

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230207

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230207

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20230207

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230509

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230620

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230919

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20231006

R150 Certificate of patent or registration of utility model

Ref document number: 7365529

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150