JPWO2021171454A1 - - Google Patents

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Publication number
JPWO2021171454A1
JPWO2021171454A1 JP2020570088A JP2020570088A JPWO2021171454A1 JP WO2021171454 A1 JPWO2021171454 A1 JP WO2021171454A1 JP 2020570088 A JP2020570088 A JP 2020570088A JP 2020570088 A JP2020570088 A JP 2020570088A JP WO2021171454 A1 JPWO2021171454 A1 JP WO2021171454A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2020570088A
Other versions
JP6892026B1 (ja
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Application granted granted Critical
Publication of JP6892026B1 publication Critical patent/JP6892026B1/ja
Publication of JPWO2021171454A1 publication Critical patent/JPWO2021171454A1/ja
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Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/82—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of the magnetic field applied to the device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N59/00—Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/088—Non-supervised learning, e.g. competitive learning

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • General Physics & Mathematics (AREA)
  • Molecular Biology (AREA)
  • Software Systems (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Computational Linguistics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Neurology (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Hall/Mr Elements (AREA)
  • Semiconductor Memories (AREA)
JP2020570088A 2020-02-27 2020-02-27 演算回路、及びニューロモーフィックデバイス Active JP6892026B1 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/007923 WO2021171454A1 (ja) 2020-02-27 2020-02-27 演算回路、及びニューロモーフィックデバイス

Publications (2)

Publication Number Publication Date
JP6892026B1 JP6892026B1 (ja) 2021-06-23
JPWO2021171454A1 true JPWO2021171454A1 (ja) 2021-09-02

Family

ID=76464502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020570088A Active JP6892026B1 (ja) 2020-02-27 2020-02-27 演算回路、及びニューロモーフィックデバイス

Country Status (4)

Country Link
US (1) US20220130900A1 (ja)
JP (1) JP6892026B1 (ja)
CN (1) CN113646912B (ja)
WO (1) WO2021171454A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019100036A1 (en) * 2017-11-20 2019-05-23 The Regents Of The University Of California Memristive neural network computing engine using cmos-compatible charge-trap-transistor (ctt)
WO2022003957A1 (ja) * 2020-07-03 2022-01-06 Tdk株式会社 集積装置及びニューロモーフィックデバイス
KR102595529B1 (ko) * 2021-11-04 2023-10-27 서울대학교산학협력단 시간 커널 소자, 시간 커널 컴퓨팅 시스템 및 그들의 동작 방법

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5160304B2 (ja) * 2008-05-22 2013-03-13 シャープ株式会社 抵抗変化型可変抵抗素子を備えた積演算装置、及び積和演算装置、これらの装置を各ニューロン素子に備えるニューラルネットワーク、並びに積演算方法
WO2011045886A1 (ja) * 2009-10-15 2011-04-21 パナソニック株式会社 抵抗変化型不揮発性記憶装置
JP4838399B2 (ja) * 2010-03-30 2011-12-14 パナソニック株式会社 不揮発性記憶装置及び不揮発性記憶装置への書き込み方法
JP5138836B2 (ja) * 2011-04-13 2013-02-06 パナソニック株式会社 参照セル回路とそれを用いた抵抗変化型不揮発性記憶装置
WO2013108299A1 (ja) * 2012-01-20 2013-07-25 パナソニック株式会社 ニューラルネットワーク回路の学習方法
WO2013111200A1 (ja) * 2012-01-23 2013-08-01 パナソニック株式会社 ニューラルネットワーク回路の学習方法
KR101649978B1 (ko) * 2012-08-06 2016-08-22 코넬 유니버시티 자기 나노구조체들의 스핀 홀 토크 효과들에 기초한 전기적 게이트 3-단자 회로들 및 디바이스들
JP6501146B2 (ja) * 2014-03-18 2019-04-17 パナソニックＩｐマネジメント株式会社 ニューラルネットワーク回路およびその学習方法
WO2016175770A1 (en) * 2015-04-28 2016-11-03 Hewlett Packard Enterprise Development Lp Memristor apparatus with variable transmission delay
WO2017213261A1 (ja) * 2016-06-10 2017-12-14 Tdk株式会社 交換バイアス利用型磁化反転素子、交換バイアス利用型磁気抵抗効果素子、交換バイアス利用型磁気メモリ、不揮発性ロジック回路および磁気ニューロン素子
JPWO2018052062A1 (ja) * 2016-09-14 2019-07-04 Tdk株式会社 磁気抵抗効果デバイスおよび磁気抵抗効果モジュール
WO2018100790A1 (ja) * 2016-11-30 2018-06-07 国立研究開発法人科学技術振興機構 ニューロン回路、システムおよびスイッチ回路
CN106815636B (zh) * 2016-12-30 2019-03-05 华中科技大学 一种基于忆阻器的神经元电路
CN109997155A (zh) * 2017-11-02 2019-07-09 Tdk株式会社 包含仿神经元件的阵列装置及神经网络系统
JP6978902B2 (ja) * 2017-11-10 2021-12-08 富士通株式会社 化合物半導体装置、受信機、及び化合物半導体装置の製造方法。
US11829863B2 (en) * 2018-03-30 2023-11-28 Tohoku University Neural network circuit device
CN108777153B (zh) * 2018-05-25 2021-01-26 华中科技大学 一种多端输入突触器件及其可塑性调制方法
JP6881406B2 (ja) * 2018-08-31 2021-06-02 株式会社村田製作所 方向性結合器

Also Published As

Publication number Publication date
US20220130900A1 (en) 2022-04-28
CN113646912A (zh) 2021-11-12
JP6892026B1 (ja) 2021-06-23
CN113646912B (zh) 2024-02-27
WO2021171454A1 (ja) 2021-09-02

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