JPWO2021140998A1 - - Google Patents
Info
- Publication number
- JPWO2021140998A1 JPWO2021140998A1 JP2021570039A JP2021570039A JPWO2021140998A1 JP WO2021140998 A1 JPWO2021140998 A1 JP WO2021140998A1 JP 2021570039 A JP2021570039 A JP 2021570039A JP 2021570039 A JP2021570039 A JP 2021570039A JP WO2021140998 A1 JPWO2021140998 A1 JP WO2021140998A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
- H05B45/375—Switched mode power supply [SMPS] using buck topology
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/32—Pulse-control circuits
- H05B45/325—Pulse-width modulation [PWM]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Led Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2020003169 | 2020-01-10 | ||
PCT/JP2020/049287 WO2021140998A1 (ja) | 2020-01-10 | 2020-12-29 | 半導体装置、および半導体装置システム |
Publications (1)
Publication Number | Publication Date |
---|---|
JPWO2021140998A1 true JPWO2021140998A1 (ja) | 2021-07-15 |
Family
ID=76787961
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2021570039A Pending JPWO2021140998A1 (ja) | 2020-01-10 | 2020-12-29 |
Country Status (5)
Country | Link |
---|---|
US (1) | US11874694B2 (ja) |
JP (1) | JPWO2021140998A1 (ja) |
CN (1) | CN114930268B (ja) |
DE (1) | DE112020006500T9 (ja) |
WO (1) | WO2021140998A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024130441A1 (en) * | 2022-12-23 | 2024-06-27 | Vuereal Inc. | Micro-led with integrated can bus and actuators in transportation vehicles |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020102957A1 (en) * | 2001-01-29 | 2002-08-01 | Han-Yang Tseng | Radio signal receiving control device and the control method for the same |
US7336752B2 (en) * | 2002-12-31 | 2008-02-26 | Mosaid Technologies Inc. | Wide frequency range delay locked loop |
US7177611B2 (en) * | 2004-07-07 | 2007-02-13 | Texas Instruments Incorporated | Hybrid control of phase locked loops |
JP2006039830A (ja) * | 2004-07-26 | 2006-02-09 | Renesas Technology Corp | 半導体集積回路 |
JP2006191372A (ja) * | 2005-01-06 | 2006-07-20 | Matsushita Electric Ind Co Ltd | デュアルループpllおよび逓倍クロック発生装置 |
JP4751178B2 (ja) * | 2005-10-27 | 2011-08-17 | エルピーダメモリ株式会社 | 同期型半導体装置 |
KR100843197B1 (ko) * | 2006-02-28 | 2008-07-02 | 삼성전자주식회사 | 위상이 다른 다수개의 드라우지 클럭 신호들을 내부적으로발생하는 집적회로 장치 |
JP2008099002A (ja) * | 2006-10-12 | 2008-04-24 | Elpida Memory Inc | Dll回路 |
JP2009200661A (ja) * | 2008-02-20 | 2009-09-03 | Hitachi Ltd | 半導体集積回路装置および逓倍クロック生成方法 |
JP4569656B2 (ja) * | 2008-03-28 | 2010-10-27 | ソニー株式会社 | 遅延同期ループ回路および表示装置 |
US8073092B2 (en) * | 2008-06-19 | 2011-12-06 | Microchip Technology Incorporated | Automatic synchronization of an internal oscillator to an external frequency reference |
KR101035856B1 (ko) * | 2010-05-31 | 2011-05-19 | 주식회사 아나패스 | 타이밍 컨트롤러와 데이터 구동ic들 사이의 인터페이스 시스템 및 디스플레이 장치 |
JP5613605B2 (ja) * | 2011-03-28 | 2014-10-29 | ルネサスエレクトロニクス株式会社 | クロック生成回路、それを用いたプロセッサシステム、及びクロック周波数制御方法 |
KR101193305B1 (ko) * | 2011-08-02 | 2012-10-19 | 삼성전기주식회사 | 디밍제어장치, 엘이디 구동장치 및 디밍제어방법 |
US8315128B1 (en) * | 2012-01-09 | 2012-11-20 | Lsi Corporation | Heat assisted magnetic recording system |
US8933643B2 (en) * | 2012-04-20 | 2015-01-13 | Apple Inc. | Display backlight driver IC configuration |
US9485825B2 (en) * | 2014-11-07 | 2016-11-01 | Power Integrations, Inc. | Enable circuit for lighting drivers |
JP6284496B2 (ja) * | 2015-02-20 | 2018-02-28 | オムロンオートモーティブエレクトロニクス株式会社 | 電圧変換装置 |
WO2017143202A1 (en) * | 2016-02-19 | 2017-08-24 | University Of Massachusetts | Multi-well quartz crystal microbalance mass and viscoelastic sensor |
JP2019179662A (ja) | 2018-03-30 | 2019-10-17 | 株式会社デンソーテン | 光源駆動装置および光源駆動方法 |
JP7111504B2 (ja) * | 2018-04-25 | 2022-08-02 | シャープ株式会社 | Ledモジュールおよびバックライト装置 |
US11271572B2 (en) * | 2020-04-29 | 2022-03-08 | Analog Devices International Unlimited Company | Self-tuning phase-locked loop (PLL) circuit |
-
2020
- 2020-12-29 US US17/791,634 patent/US11874694B2/en active Active
- 2020-12-29 DE DE112020006500.6T patent/DE112020006500T9/de active Active
- 2020-12-29 WO PCT/JP2020/049287 patent/WO2021140998A1/ja active Application Filing
- 2020-12-29 CN CN202080092477.0A patent/CN114930268B/zh active Active
- 2020-12-29 JP JP2021570039A patent/JPWO2021140998A1/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
CN114930268B (zh) | 2024-05-17 |
CN114930268A (zh) | 2022-08-19 |
DE112020006500T5 (de) | 2022-12-01 |
DE112020006500T9 (de) | 2023-01-19 |
US20230066399A1 (en) | 2023-03-02 |
US11874694B2 (en) | 2024-01-16 |
WO2021140998A1 (ja) | 2021-07-15 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20231129 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20240730 |