JPWO2021080686A5 - - Google Patents

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Publication number
JPWO2021080686A5
JPWO2021080686A5 JP2022523216A JP2022523216A JPWO2021080686A5 JP WO2021080686 A5 JPWO2021080686 A5 JP WO2021080686A5 JP 2022523216 A JP2022523216 A JP 2022523216A JP 2022523216 A JP2022523216 A JP 2022523216A JP WO2021080686 A5 JPWO2021080686 A5 JP WO2021080686A5
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JP
Japan
Prior art keywords
signal
state
transition
clock
clock recovery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2022523216A
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English (en)
Japanese (ja)
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JP2022552852A (ja
Publication date
Priority claimed from US17/001,801 external-priority patent/US11095425B2/en
Application filed filed Critical
Publication of JP2022552852A publication Critical patent/JP2022552852A/ja
Publication of JPWO2021080686A5 publication Critical patent/JPWO2021080686A5/ja
Pending legal-status Critical Current

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JP2022523216A 2019-10-25 2020-08-26 高速次世代c-phyのための小ループ遅延クロックおよびデータ復元ブロック Pending JP2022552852A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201962925916P 2019-10-25 2019-10-25
US62/925,916 2019-10-25
US17/001,801 US11095425B2 (en) 2019-10-25 2020-08-25 Small loop delay clock and data recovery block for high-speed next generation C-PHY
US17/001,801 2020-08-25
PCT/US2020/047919 WO2021080686A1 (en) 2019-10-25 2020-08-26 Small loop delay clock and data recovery block for high-speed next generation c-phy

Publications (2)

Publication Number Publication Date
JP2022552852A JP2022552852A (ja) 2022-12-20
JPWO2021080686A5 true JPWO2021080686A5 (zh) 2023-08-03

Family

ID=75586326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022523216A Pending JP2022552852A (ja) 2019-10-25 2020-08-26 高速次世代c-phyのための小ループ遅延クロックおよびデータ復元ブロック

Country Status (8)

Country Link
US (2) US11095425B2 (zh)
EP (1) EP4049402B1 (zh)
JP (1) JP2022552852A (zh)
KR (1) KR20220087445A (zh)
CN (2) CN114616793B (zh)
BR (1) BR112022007282A2 (zh)
TW (1) TWI746133B (zh)
WO (1) WO2021080686A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11095425B2 (en) 2019-10-25 2021-08-17 Qualcomm Incorporated Small loop delay clock and data recovery block for high-speed next generation C-PHY
CN115129636A (zh) * 2021-05-17 2022-09-30 广东高云半导体科技股份有限公司 接口桥装置及其转换方法
TWI804338B (zh) * 2022-06-02 2023-06-01 國立中山大學 電壓及溫度變異偵測器
KR102694980B1 (ko) 2024-02-08 2024-08-14 주식회사 램쉽 신호수신회로, 신호수신장치 및 수신신호의 클럭복원방법

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7099400B2 (en) 2003-01-22 2006-08-29 Agere Systems Inc. Multi-level pulse amplitude modulation receiver
US20060181320A1 (en) 2005-02-11 2006-08-17 International Business Machines Corporation Circuit for optimizing the duty cycle of a received clock transmitted over a transmission line
US8064535B2 (en) * 2007-03-02 2011-11-22 Qualcomm Incorporated Three phase and polarity encoded serial interface
US9374216B2 (en) * 2013-03-20 2016-06-21 Qualcomm Incorporated Multi-wire open-drain link with data symbol transition based clocking
US9313058B2 (en) * 2013-03-07 2016-04-12 Qualcomm Incorporated Compact and fast N-factorial single data rate clock and data recovery circuits
US9363071B2 (en) * 2013-03-07 2016-06-07 Qualcomm Incorporated Circuit to recover a clock signal from multiple wire data signals that changes state every state cycle and is immune to data inter-lane skew as well as data state transition glitches
US9137008B2 (en) * 2013-07-23 2015-09-15 Qualcomm Incorporated Three phase clock recovery delay calibration
US9246666B2 (en) * 2014-03-27 2016-01-26 Intel Corporation Skew tolerant clock recovery architecture
US9496879B1 (en) * 2015-09-01 2016-11-15 Qualcomm Incorporated Multiphase clock data recovery for a 3-phase interface
US9485080B1 (en) * 2015-09-01 2016-11-01 Qualcomm Incorporated Multiphase clock data recovery circuit calibration
US10128964B2 (en) * 2016-03-10 2018-11-13 Qualcomm Incorporated Multiphase preamble data sequences for receiver calibration and mode data signaling
US10742390B2 (en) * 2016-07-13 2020-08-11 Novatek Microelectronics Corp. Method of improving clock recovery and related device
US10419246B2 (en) * 2016-08-31 2019-09-17 Qualcomm Incorporated C-PHY training pattern for adaptive equalization, adaptive edge tracking and delay calibration
US9735950B1 (en) 2016-10-18 2017-08-15 Omnivision Technologies, Inc. Burst mode clock data recovery circuit for MIPI C-PHY receivers
US10033519B2 (en) * 2016-11-10 2018-07-24 Qualcomm Incorporated C-PHY half-rate clock and data recovery adaptive edge tracking
KR20180061560A (ko) 2016-11-29 2018-06-08 삼성전자주식회사 통신 환경에 의존하여 지연을 조절하는 전자 회로
US10437744B2 (en) * 2017-12-18 2019-10-08 Intel Corporation Reconfigurable camera serial interface
US10298381B1 (en) 2018-04-30 2019-05-21 Qualcomm Incorporated Multiphase clock data recovery with adaptive tracking for a multi-wire, multi-phase interface
US10333690B1 (en) * 2018-05-04 2019-06-25 Qualcomm Incorporated Calibration pattern and duty-cycle distortion correction for clock data recovery in a multi-wire, multi-phase interface
US10454725B1 (en) * 2018-09-27 2019-10-22 Qualcomm Incorporated C-PHY receiver equalization
US11095425B2 (en) 2019-10-25 2021-08-17 Qualcomm Incorporated Small loop delay clock and data recovery block for high-speed next generation C-PHY

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