JPWO2021075434A1 - - Google Patents

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Publication number
JPWO2021075434A1
JPWO2021075434A1 JP2021552400A JP2021552400A JPWO2021075434A1 JP WO2021075434 A1 JPWO2021075434 A1 JP WO2021075434A1 JP 2021552400 A JP2021552400 A JP 2021552400A JP 2021552400 A JP2021552400 A JP 2021552400A JP WO2021075434 A1 JPWO2021075434 A1 JP WO2021075434A1
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JP
Japan
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JP2021552400A
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Japanese (ja)
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JP7610128B2 (ja
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
    • H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/909—Microarchitecture
    • H10D84/935—Degree of specialisation for implementing specific functions
    • H10D84/937—Implementation of digital circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/968—Macro-architecture
    • H10D84/974—Layout specifications, i.e. inner core regions
    • H10D84/975—Wiring regions or routing

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2021552400A 2019-10-18 2020-10-13 半導体集積回路装置 Active JP7610128B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019191448 2019-10-18
JP2019191448 2019-10-18
PCT/JP2020/038662 WO2021075434A1 (ja) 2019-10-18 2020-10-13 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPWO2021075434A1 true JPWO2021075434A1 (https=) 2021-04-22
JP7610128B2 JP7610128B2 (ja) 2025-01-08

Family

ID=75538496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021552400A Active JP7610128B2 (ja) 2019-10-18 2020-10-13 半導体集積回路装置

Country Status (4)

Country Link
US (2) US12356714B2 (https=)
JP (1) JP7610128B2 (https=)
CN (1) CN114556563B (https=)
WO (1) WO2021075434A1 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7640861B2 (ja) * 2019-10-18 2025-03-06 株式会社ソシオネクスト 半導体集積回路装置
US12363977B2 (en) 2021-08-31 2025-07-15 International Business Machines Corporation Forming dielectric sidewall and bottom dielectric isolation in Fork-FET devices
US20230114214A1 (en) * 2021-09-24 2023-04-13 Intel Corporation Single-sided nanosheet transistors
WO2023248772A1 (ja) * 2022-06-20 2023-12-28 株式会社ソシオネクスト 半導体集積回路装置
WO2024116853A1 (ja) * 2022-11-29 2024-06-06 株式会社ソシオネクスト 半導体集積回路装置
WO2025115361A1 (ja) * 2023-11-30 2025-06-05 株式会社ソシオネクスト 半導体集積回路装置
WO2025126580A1 (ja) * 2023-12-14 2025-06-19 株式会社ソシオネクスト 半導体集積回路装置
WO2025126581A1 (ja) * 2023-12-14 2025-06-19 株式会社ソシオネクスト 半導体集積回路装置
WO2025126579A1 (ja) * 2023-12-14 2025-06-19 株式会社ソシオネクスト 半導体集積回路装置
WO2025169526A1 (ja) * 2024-02-06 2025-08-14 株式会社ソシオネクスト 半導体集積回路装置
WO2025177613A1 (ja) * 2024-02-21 2025-08-28 株式会社ソシオネクスト 半導体集積回路装置
WO2025177614A1 (ja) * 2024-02-21 2025-08-28 株式会社ソシオネクスト 半導体集積回路装置
WO2025211200A1 (ja) * 2024-04-01 2025-10-09 株式会社ソシオネクスト 半導体集積回路装置
WO2025211201A1 (ja) * 2024-04-01 2025-10-09 株式会社ソシオネクスト 半導体集積回路装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567634A (ja) * 1991-09-06 1993-03-19 Oki Electric Ind Co Ltd Ｍｉｓ型半導体装置の製造方法
JP2009016525A (ja) * 2007-07-04 2009-01-22 Renesas Technology Corp 半導体装置
US20160111337A1 (en) * 2014-10-21 2016-04-21 Samsung Electronics Co., Ltd. Strained stacked nanosheet fets and/or quantum well stacked nanosheet
WO2018003634A1 (ja) * 2016-07-01 2018-01-04 株式会社ソシオネクスト 半導体集積回路装置
WO2018025580A1 (ja) * 2016-08-01 2018-02-08 株式会社ソシオネクスト 半導体集積回路装置
WO2018074172A1 (ja) * 2016-10-17 2018-04-26 株式会社ソシオネクスト 半導体集積回路装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2576253B2 (ja) * 1990-02-09 1997-01-29 日本電気株式会社 Ｄ／ａ変換装置
CN106663594B (zh) * 2014-06-23 2020-08-25 美商新思科技有限公司 具有含不同数量的纳米线或2d材料带的晶体管的存储单元和逻辑单元
KR102413610B1 (ko) * 2016-03-02 2022-06-24 삼성전자주식회사 레이아웃 디자인 시스템, 이를 이용한 반도체 장치 및 그 제조 방법
WO2018030107A1 (ja) * 2016-08-08 2018-02-15 株式会社ソシオネクスト 半導体集積回路装置
KR20250070116A (ko) * 2017-11-30 2025-05-20 인텔 코포레이션 진보된 집적 회로 구조체 제조를 위한 핀 패터닝
US10977417B2 (en) * 2018-09-28 2021-04-13 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure, device, and method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567634A (ja) * 1991-09-06 1993-03-19 Oki Electric Ind Co Ltd Ｍｉｓ型半導体装置の製造方法
JP2009016525A (ja) * 2007-07-04 2009-01-22 Renesas Technology Corp 半導体装置
US20160111337A1 (en) * 2014-10-21 2016-04-21 Samsung Electronics Co., Ltd. Strained stacked nanosheet fets and/or quantum well stacked nanosheet
WO2018003634A1 (ja) * 2016-07-01 2018-01-04 株式会社ソシオネクスト 半導体集積回路装置
WO2018025580A1 (ja) * 2016-08-01 2018-02-08 株式会社ソシオネクスト 半導体集積回路装置
WO2018074172A1 (ja) * 2016-10-17 2018-04-26 株式会社ソシオネクスト 半導体集積回路装置

Also Published As

Publication number Publication date
CN114556563B (zh) 2025-04-22
US20250311421A1 (en) 2025-10-02
JP7610128B2 (ja) 2025-01-08
CN114556563A (zh) 2022-05-27
WO2021075434A1 (ja) 2021-04-22
US20220246644A1 (en) 2022-08-04
US12356714B2 (en) 2025-07-08

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