JPWO2020138185A1 - How to manufacture solar cells - Google Patents

Abstract

Provided is a method for manufacturing a solar cell capable of simplifying the manufacturing process and suppressing peeling of the lift-off layer. The method for manufacturing a solar cell includes a step of forming a first semiconductor layer material film on the back surface side of the semiconductor substrate 11, a step of forming a lift-off layer on the material film, and a step of forming a protective layer on the lift-off layer. , A step of forming the first semiconductor layer 25, the lift-off layer 41 and the protective layer 51 patterned in the first region 7 using the pattern printing resist 90, and removing the pattern printing resist 90 and the protective layer 51. By forming the second semiconductor layer material film on the lift-off layer 41 of the 1 region 7 and on the second region 8 and removing the lift-off layer 41, the second semiconductor layer patterned in the second region 8 is formed. In the first semiconductor layer forming step, which includes a step of forming, the protective layer 51 is removed with a solution that protects the lift-off layer 41 from the solution used for patterning and removes the pattern printing resist 90.

Description

The present invention relates to a method for manufacturing a back electrode type (back contact type) solar cell.

As a solar cell using a semiconductor substrate, there are a double-sided electrode type solar cell in which electrodes are formed on both the light receiving surface side and the back surface side, and a back surface electrode type solar cell in which electrodes are formed only on the back surface side. In a double-sided electrode type solar cell, since an electrode is formed on the light receiving surface side, sunlight is shielded by this electrode. On the other hand, in the back electrode type solar cell, since the electrode is not formed on the light receiving surface side, the light receiving rate of sunlight is higher than that of the double-sided electrode type solar cell. Patent Document 1 discloses a back electrode type solar cell.

The solar cell described in Patent Document 1 includes a semiconductor substrate that functions as a photoelectric conversion layer, a first conductive semiconductor layer and a first electrode layer that are sequentially laminated on a part of the back surface side of the semiconductor substrate, and a back surface of the semiconductor substrate. A second conductive semiconductor layer and a second electrode layer, which are sequentially laminated on the other part of the side, are provided.

Japanese Unexamined Patent Publication No. 2014-75526

Generally, in the patterning of the first conductive semiconductor layer (first patterning) and the patterning of the second conductive semiconductor layer (second patterning), an etching method using a photolithography technique is used. However, in the etching method using the photolithography technique, for example, photoresist coating by the spin coating method, photoresist drying, photoresist exposure, photoresist development, etching of a semiconductor layer using a photoresist as a mask, and photoresist peeling can be performed. A process was required and the process was complicated.

In this regard, Patent Document 1 describes a technique for simplifying the patterning process by a lift-off method using a lift-off layer (sacrificial layer) in the second patterning. The lift-off layer is formed before the first patterning and is patterned with the semiconductor layer in the first patterning. At the time of this first patterning, the lift-off layer may be peeled off depending on the combination of the type of lift-off layer and the resist used for patterning.

An object of the present invention is to provide a method for manufacturing a solar cell capable of simplifying the manufacturing process and suppressing peeling of the lift-off layer.

The method for manufacturing a solar cell according to the present invention includes a semiconductor substrate, a first conductive semiconductor layer laminated in order in a first region which is a part of one main surface side and the other main surface side of the semiconductor substrate. Manufacture of a back electrode type solar cell including a first electrode layer, a second conductive semiconductor layer and a second electrode layer sequentially laminated in a second region which is another part on the other main surface side of the semiconductor substrate. The method is a first semiconductor layer material film forming step of forming a material film of a first conductive semiconductor layer on the other main surface side of a semiconductor substrate, and a lift-off on the material film of the first conductive semiconductor layer. A lift-off layer forming step of forming a layer, a first protective layer forming step of forming a first protective layer for protecting the lift-off layer on the lift-off layer, and a first protection in a second region using a pattern printing resist. By removing the material films of the layer, the lift-off layer and the first conductive semiconductor layer, a patterned first conductive semiconductor layer, lift-off layer and first protective layer are formed in the first region, and a pattern printing resist is formed. A first semiconductor layer forming step for removing the first protective layer in the first region, and a second semiconductor layer for forming a material film of the second conductive semiconductor layer on the lift-off layer in the first region and in the second region. By removing the material film forming step and the lift-off layer, the material film of the second conductive semiconductor layer in the first region is removed, and the patterned second conductive semiconductor layer is formed in the second region. In the first semiconductor layer forming step, which includes two semiconductor layer forming steps, the first protective layer in the first region protects the lift-off layer in the first region from the solution used for patterning and removes the pattern printing resist. Is removed with a solution.

According to the present invention, it is possible to simplify the manufacturing process of the solar cell and suppress the peeling of the lift-off layer.

It is the figure which looked at the solar cell which concerns on this embodiment from the back side. FIG. 2 is a sectional view taken along line II-II of the solar cell of FIG. It is a figure which shows the 1st semiconductor layer material film forming step, the lift-off layer forming step, the 1st protective layer forming step, the insulating layer forming step and the 2nd protective layer forming step in the manufacturing method of the solar cell which concerns on this Embodiment. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 2nd semiconductor layer material film formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 2nd semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the electrode layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 1st semiconductor layer material film forming process and the lift-off layer forming process in the manufacturing method of the solar cell of the comparative example. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell of the comparative example. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell of the comparative example. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell of the comparative example. It is a figure which shows the process of forming the 2nd semiconductor layer material film in the manufacturing method of the solar cell of the comparative example. It is a figure which shows the 2nd semiconductor layer formation process in the manufacturing method of the solar cell of the comparative example. It is a figure which shows the electrode layer formation process in the manufacturing method of the solar cell of the comparative example. It is a figure which shows the optical adjustment layer forming process in the manufacturing method of the solar cell of the comparative example.

Hereinafter, an example of the embodiment of the present invention will be described with reference to the accompanying drawings. In addition, the same reference numerals are given to the same or corresponding parts in each drawing. In addition, for convenience, hatching, member codes, and the like may be omitted, but in such cases, other drawings shall be referred to.

(Solar cell)
FIG. 1 is a view of the solar cell according to the present embodiment as viewed from the back surface side. The solar cell 1 shown in FIG. 1 is a back electrode type solar cell. The solar cell 1 includes an n-type (second conductive type) semiconductor substrate 11 having two main surfaces, and has a first region 7 and a second region 8 on the main surface of the semiconductor substrate 11.

The first region 7 has a so-called comb-shaped shape, and has a plurality of finger portions 7f corresponding to the comb teeth and a bus bar portion 7b corresponding to the support portion of the comb teeth. The bus bar portion 7b extends in the first direction (X direction) along one side of the semiconductor substrate 11, and the finger portion 7f intersects the bus bar portion 7b in the first direction (X direction). It extends in the direction (Y direction).
Similarly, the second region 8 has a so-called comb-shaped shape, and has a plurality of finger portions 8f corresponding to the comb teeth and a bus bar portion 8b corresponding to the support portion of the comb teeth. The bus bar portion 8b extends in the first direction (X direction) along the other side portion facing one side portion of the semiconductor substrate 11, and the finger portion 8f extends from the bus bar portion 8b in the second direction (Y). Extends in the direction).
The finger portions 7f and the finger portions 8f are alternately provided in the first direction (X direction).
The first region 7 and the second region 8 may be formed in a striped shape.

FIG. 2 is a sectional view taken along line II-II of the solar cell of FIG. As shown in FIG. 2, the solar cell 1 includes a semiconductor substrate 11, an intrinsic semiconductor layer 13 and optics, which are sequentially laminated on the light receiving surface side, which is one of the main surfaces of the semiconductor substrate 11 on the light receiving side. The adjusting layer 15 is provided. Further, the solar cell 1 is an intrinsic semiconductor layer 23, p. A mold (first conductive type) semiconductor layer 25 and a first electrode layer 27 are provided. Further, the solar cell 1 includes an intrinsic semiconductor layer 33, an n-type (second conductive type) semiconductor layer 35, and a second electrode, which are sequentially laminated on another part (second region 8) on the back surface side of the semiconductor substrate 11. The layer 37 is provided.

The semiconductor substrate 11 is formed of a crystalline silicon material such as single crystal silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. Examples of the n-type dopant include phosphorus (P).
The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light receiving surface side to generate optical carriers (electrons and holes).
By using crystalline silicon as the material of the semiconductor substrate 11, a relatively high output (stable output regardless of the illuminance) can be obtained even when the dark current is relatively small and the intensity of the incident light is low.

The intrinsic semiconductor layer 13 is formed on the light receiving surface side of the semiconductor substrate 11. The intrinsic semiconductor layer 23 is formed in the first region 7 on the back surface side of the semiconductor substrate 11. The intrinsic semiconductor layer 33 is formed in the second region 8 on the back surface side of the semiconductor substrate 11. The intrinsic semiconductor layers 13, 23, 33 are formed of, for example, a material containing intrinsic (i-type) amorphous silicon as a main component.
The intrinsic semiconductor layers 13, 23, 33 function as so-called passivation layers, suppress the recombination of carriers generated in the semiconductor substrate 11, and increase the carrier recovery efficiency.

The optical adjustment layer 15 is formed on the intrinsic semiconductor layer 13 on the light receiving surface side of the semiconductor substrate 11. The optical adjustment layer 15 functions as an antireflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light receiving surface side of the semiconductor substrate 11 and the intrinsic semiconductor layer 13. The optical adjustment layer 15 is formed of an insulating material such as a composite thereof such as silicon oxide (SiO), silicon nitride (SiN), or silicon oxynitride (SiON).

The p-type semiconductor layer 25 is formed on the intrinsic semiconductor layer 23, that is, in the first region 7 on the back surface side of the semiconductor substrate 11. The p-type semiconductor layer 25 is formed of, for example, an amorphous silicon material. The p-type semiconductor layer 25 is, for example, a p-type semiconductor layer in which an amorphous silicon material is doped with a p-type dopant. Examples of the p-type dopant include boron (B).

The n-type semiconductor layer 35 is formed on the intrinsic semiconductor layer 33, that is, in the second region 8 on the back surface side of the semiconductor substrate 11. The n-type semiconductor layer 35 is formed of, for example, an amorphous silicon material. The n-type semiconductor layer 35 is, for example, an n-type semiconductor layer in which an amorphous silicon material is doped with an n-type dopant (for example, phosphorus (P) described above).

The first electrode layer 27 is formed on the p-type semiconductor layer 25, and the second electrode layer 37 is formed on the n-type semiconductor layer 35.
The first electrode layer 27 has a transparent electrode layer 28 and a metal electrode layer 29 that are sequentially laminated on the p-type semiconductor layer 25. The second electrode layer 37 has a transparent electrode layer 38 and a metal electrode layer 39 which are sequentially laminated on the n-type semiconductor layer 35.
The transparent electrode layers 28 and 38 are formed of a transparent conductive material. Examples of the transparent conductive material include ITO (Indium Tin Oxide: a composite oxide of indium tin oxide and tin oxide) and ZnO (Zinc Oxide: zinc oxide). The metal electrode layers 29 and 39 are formed of a conductive paste material containing a metal powder such as silver.

(Manufacturing method of solar cell of comparative example)
The inventors of the present application have devised the use of a pattern printing resist by a pattern printing method in the patterning of the p-type semiconductor layer (first patterning). As a result, the number of exposure and development steps can be reduced as compared with the case of using the photoresist (photolithography method) by the spin coating method, and the manufacturing process of the solar cell can be simplified.
Further, the inventors of the present application have devised to adopt a lift-off method using a lift-off layer (sacrificial layer) in the patterning of the n-type semiconductor layer (second patterning). This makes it possible to simplify the manufacturing process of solar cells.
Furthermore, the inventors of the present application have devised to adopt an inexpensive alkaline solution as a solution for removing the pattern printing resist in the patterning of the p-type semiconductor layer. This makes it possible to reduce the cost of the solar cell.

Note that pattern printing is not printing that goes through processes such as exposure and development after forming a resist film (non-patterned resist film) before patterning, as in the photolithography method, but screen printing or gravure. It means a printing method in which a patterned resist (printing material) is directly adhered to a resist adhering surface such as press printing such as printing or ejection printing such as inkjet printing. Further, the pattern printing resist means a printing material (resist material) used for pattern printing.

Hereinafter, a method for manufacturing a comparative example solar cell 1X based on the invention of the present inventors and a problem thereof will be described with reference to FIGS. 4A to 4H. FIG. 4A is a diagram showing a first semiconductor layer material film forming step and a lift-off layer forming step in the solar cell manufacturing method of the comparative example, and FIGS. 4B to 4D are the first in the solar cell manufacturing method of the comparative example. It is a figure which shows the semiconductor layer formation process. Further, FIG. 4E is a diagram showing a second semiconductor layer material film forming step in the solar cell manufacturing method of the comparative example, and FIG. 4F shows a second semiconductor layer forming step in the solar cell manufacturing method of the comparative example. It is a figure. Further, FIG. 4G is a diagram showing an electrode layer forming step in the solar cell manufacturing method of the comparative example, and FIG. 4H is a diagram showing an optical adjustment layer forming step in the solar cell manufacturing method of the comparative example.

First, as shown in FIG. 4A, the intrinsic semiconductor layer material film 23ZX and the p-type semiconductor layer material film 25ZX are laminated in order on the entire back surface side of the semiconductor substrate 11X by using, for example, the CVD method (chemical vapor deposition method). (Film formation) (first semiconductor layer material film forming step).
Further, for example, by using a CVD method, the intrinsic semiconductor layer 13X is laminated (film-formed) on the entire surface of the semiconductor substrate 11X on the light receiving surface side. The order of film formation of the intrinsic semiconductor layer material film 23ZX and the p-type semiconductor layer material film 25ZX and the intrinsic semiconductor layer 13X is not limited.

Next, for example, using a CVD method, a lift-off layer (sacrificial layer) 41X is laminated (film-formed) on the entire surface of the semiconductor substrate 11X on the back surface side, specifically, on the entire surface of the p-type semiconductor layer material film 25ZX. (Lift-off layer forming process).
The lift-off layer 41X is formed of a material such as silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON).

Next, as shown in FIGS. 4B to 4D, the intrinsic semiconductor layer material film 23ZX, the p-type semiconductor layer material film 25ZX, and the lift-off layer in the second region 8 on the back surface side of the semiconductor substrate 11X using the pattern printing resist. By removing 41X, a patterned intrinsic semiconductor layer 23X, a p-type semiconductor layer 25X, and a lift-off layer 41X are formed in the first region 7 (first semiconductor layer forming step).

Specifically, as shown in FIG. 4B, a pattern printing resist 90X is formed on the first region 7 on the back surface side of the semiconductor substrate 11X and the entire surface on the light receiving surface side of the semiconductor substrate 11X by using a pattern printing method. The film thickness of the pattern print resist is, for example, 1 μm or more and 50 μm or less. According to the pattern printing resist using the pattern printing method, exposure and development of the resist in the photoresist (photolithography method) using the conventional spin coating method become unnecessary (simplification of the manufacturing process).

Then, as shown in FIG. 4C, the lift-off layer 41X, the p-type semiconductor layer material film 25ZX, and the intrinsic semiconductor layer material film 23ZX in the second region 8 are etched with the pattern printing resist 90X as a mask to form the first region 7 , A patterned intrinsic semiconductor layer 23X, a p-type semiconductor layer 25X, and a lift-off layer 41X are formed. As the etching solution for the lift-off layer 41X, the p-type semiconductor layer material film 25ZX, and the intrinsic semiconductor layer material film 23ZX, an acidic solution such as a mixed solution of hydrofluoric acid and nitric acid is used. At this time, the first problem arises (details will be described later).

Then, as shown in FIG. 4D, the pattern printing resist 90X is removed. An inexpensive alkaline solution is used as the etching solution for the pattern printing resist 90X (cost reduction). At this time, a second problem arises (details will be described later).

Next, both sides of the semiconductor substrate 11X are cleaned (first cleaning step). In the first cleaning step, for example, ozone treatment is followed by hydrofluoric acid treatment. The hydrofluoric acid treatment includes not only hydrofluoric acid but also treatment with a mixture of hydrofluoric acid containing another kind of acid (for example, hydrochloric acid in the first washing step).

Next, as shown in FIG. 4E, for example, using the CVD method, the intrinsic semiconductor layer material film 33ZX and the n-type semiconductor layer material film 35ZX are sequentially laminated (film-formed) on the entire back surface side of the semiconductor substrate 11X (film formation). Second semiconductor layer material film forming step).

Next, as shown in FIG. 4F, the intrinsic semiconductor layer material film 33ZX and the n-type semiconductor layer in the first region 7 on the back surface side of the semiconductor substrate 11X by using the lift-off method using the lift-off layer (sacrificial layer). By removing the material film 35ZX, a patterned intrinsic semiconductor layer 33X and an n-type semiconductor layer 35X are formed in the second region 8 (second semiconductor layer forming step).

Specifically, by removing the lift-off layer 41X, the intrinsic semiconductor layer material film 33ZX and the n-type semiconductor layer material film 35ZX on the lift-off layer 41X are removed, and the intrinsic semiconductor layer 33X and the n-type semiconductor are removed in the second region 8. Layer 35X is formed. As the removal solution for the lift-off layer 41, for example, an acidic solution such as hydrofluoric acid is used.

Next, as shown in FIG. 4G, the first electrode layer 27X and the second electrode layer 37X are formed on the back surface side of the semiconductor substrate 11X (electrode layer forming step).
Specifically, for example, a PVD method (physical vapor deposition method) such as a sputtering method is used to laminate (form) a transparent electrode layer material film on the entire back surface side of the semiconductor substrate 11X. Then, a patterned transparent electrode layer 28X, 38X is formed by removing a part of the transparent electrode layer material film by, for example, an etching method using an etching paste. As the etching solution for the transparent electrode layer material film, for example, hydrochloric acid or an aqueous ferric chloride solution is used.
Then, for example, by using a pattern printing method or a coating method to form a metal electrode layer 29X on the transparent electrode layer 28X and a metal electrode layer 39X on the transparent electrode layer 38X, the first electrode layer 27X and The second electrode layer 37X is formed.

Next, as shown in FIG. 4H, the optical adjustment layer 15X is laminated (film-formed) on the entire surface of the semiconductor substrate 11X on the light receiving surface side.
Through the above steps, the back electrode type solar cell 1X of the comparative example is completed.

(First issue)
In the first semiconductor layer forming step, when the intrinsic semiconductor layer 23X, the p-type semiconductor layer 25X and the lift-off layer 41X are patterned, the lift-off layer 41X in the first region 7 covered with the pattern printing resist 90X is peeled off. There is.
This is a pattern printing resist using a pattern printing method, which does not require exposure and development of the resist (can simplify the manufacturing process) instead of the photoresist using the conventional spin coating method (photolithography method). It is expected that this is due to the use of.
The composition of the pattern printing resist by the pattern printing method is expected to be coarser than the composition of the photoresist by the spin coating method. As a result, it is expected that hydrofluoric acid, which is a component of the etching solution, will pass through the pattern printing resist 90X, soak into the lift-off layer 41X, and the lift-off layer 41X will be peeled off.
If the lift-off layer 41X is peeled off, the lift-off process in the second semiconductor layer forming step will not be performed normally.

(Second issue)
When the pattern printing resist 90X is removed in the first semiconductor layer forming step, the intrinsic semiconductor layer 13X on the light receiving surface side is dissolved by the alkaline solution, and the performance of the solar cell 1X deteriorates.
In this regard, an insulating layer of a material such as silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON), which is resistant to alkaline solutions, is placed on the intrinsic semiconductor layer 13X. It is conceivable to form in.
However, it is expected that the same problem as the first problem described above will occur. That is, in the first semiconductor layer forming step, when the intrinsic semiconductor layer 23X, the p-type semiconductor layer 25X and the lift-off layer 41X are patterned, the insulating layer on the light receiving surface side covered with the pattern printing resist 90X is peeled off. Is expected. Then, when the pattern printing resist 90X is removed, the intrinsic semiconductor layer 13X on the light receiving surface side is dissolved by the alkaline solution.

Regarding the first problem, the inventors of the present application protect the lift-off layer from the etching solution of the p-type semiconductor layer, and apply a protective layer that is naturally removed by an alkaline solution that removes the pattern printing resist on the lift-off layer on the back surface side. Invent to form in.
Further, with respect to the second problem, the inventors of the present application devise to form an insulating layer that protects the intrinsic semiconductor layer from an alkaline solution that removes the pattern printing resist on the intrinsic semiconductor layer on the light receiving surface side. Furthermore, the inventors of the present application devise to form a protective layer that protects the insulating layer from the etching solution of the p-type semiconductor layer on the insulating layer on the light receiving surface side.

(Manufacturing method of solar cell of this embodiment)
Hereinafter, the method for manufacturing the solar cell 1 of the present embodiment shown in FIGS. 1 and 2 will be described with reference to FIGS. 3A to 3G. FIG. 3A is a diagram showing a first semiconductor layer material film forming step, a lift-off layer forming step, a first protective layer forming step, an insulating layer forming step, and a second protective layer forming step in the method for manufacturing a solar cell according to the present embodiment. 3B to 3D are diagrams showing a first semiconductor layer forming step in the method for manufacturing a solar cell according to the present embodiment. Further, FIG. 3E is a diagram showing a second semiconductor layer material film forming step in the method for manufacturing a solar cell according to the present embodiment, and FIG. 3F is a diagram showing a second semiconductor layer in the method for manufacturing a solar cell according to the present embodiment. It is a figure which shows the forming process. Further, FIG. 3G is a diagram showing an electrode layer forming step in the method for manufacturing a solar cell according to the present embodiment.

First, as shown in FIG. 3A, for example, using the CVD method, the intrinsic semiconductor layer material film 23Z and the p-type semiconductor layer material film 25Z are laminated (film-formed) in order on the entire back surface side of the semiconductor substrate 11. 1 Semiconductor layer material film forming step).
Further, for example, by using a CVD method, the intrinsic semiconductor layer 13 is laminated (film-formed) on the entire surface of the semiconductor substrate 11 on the light receiving surface side.

Next, for example, using a CVD method, a lift-off layer (sacrificial layer) 41 is laminated (film-formed) on the entire surface of the back surface side of the semiconductor substrate 11, specifically, on the entire surface of the p-type semiconductor layer material film 25Z. (Lift-off layer forming process).
Further, for example, by using a CVD method, the insulating layer 43 is laminated (film-formed) on the entire surface of the semiconductor substrate 11 on the light receiving surface side, specifically, on the entire surface of the intrinsic semiconductor layer 13 (insulation layer forming step).
The lift-off layer 41 and the insulating layer 43 are formed of a material such as silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON). As a result, the lift-off layer 41 and the insulating layer 43 are resistant to alkaline solutions and are easily removed by hydrofluoric acid treatment (treatment with hydrofluoric acid or a mixture of hydrofluoric acid and other types of acids). NS. The film thickness of the lift-off layer 41 and the insulating layer 43 is preferably, for example, 1 nm or more and 1 μm or less.

Next, for example, using a CVD method, a first protective layer 51 that protects the lift-off layer 41 is laminated (film-formed) on the entire surface of the semiconductor substrate 11 on the back surface side, specifically, on the entire surface of the lift-off layer 41. (First protective layer forming step).
Further, for example, by using a CVD method, a second protective layer 53 that protects the insulating layer 43 is laminated (film-formed) on the entire surface of the semiconductor substrate 11 on the light receiving surface side, specifically, on the entire surface on the insulating layer 43. (Second protective layer forming step).
The first protective layer 51 and the second protective layer 53 are formed of a material containing silicon as a main component. As a result, the first protective layer 51 and the second protective layer 53 are resistant to acid treatment, for example, hydrofluoric acid treatment (treatment with hydrofluoric acid or a mixture of hydrofluoric acid and other types of acids). , Easily removed with alkaline solution. The film thickness of the first protective layer 51 and the second protective layer 53 is preferably, for example, 1 nm or more and 50 nm or less.

Next, as shown in FIGS. 3B to 3D, on the back surface side of the semiconductor substrate 11, the first protective layer 51, the lift-off layer 41, and the p-type semiconductor layer material film 25Z in the second region 8 are used. By removing the material film 23Z of the intrinsic semiconductor layer, a patterned intrinsic semiconductor layer 23, a p-type semiconductor layer 25, a lift-off layer 41, and a first protective layer 51 are formed in the first region 7 (first semiconductor). Layer formation step).

Specifically, as shown in FIG. 3B, a pattern printing resist 90 is formed on the first region 7 on the back surface side of the semiconductor substrate 11X and the entire surface on the light receiving surface side of the semiconductor substrate 11X by using a pattern printing method. The film thickness of the pattern print resist is, for example, 1 μm or more and 50 μm or less. Then, as shown in FIG. 3C, the first protective layer 51, the lift-off layer 41, the first conductive semiconductor layer material film 25Z, and the intrinsic semiconductor layer material film 23Z in the second region 8 are etched using the pattern printing resist 90 as a mask. By doing so, the intrinsic semiconductor layer 23, the p-type semiconductor layer 25, the lift-off layer 41, and the first protective layer 51 are formed. Examples of the etching solution for the first protective layer 51, the lift-off layer 41, the first conductive semiconductor layer material film 25Z, and the intrinsic semiconductor layer material film 23Z include a mixed solution in which ozone is dissolved in hydrofluoric acid, or hydrofluoric acid and nitric acid. An acidic solution such as a mixed solution of the above is used.

At this time, the first protective layer 51 protects the lift-off layer 41 from the etching solution that passes through the pattern printing resist 90. Here, to protect the lift-off layer 41 means to protect the lift-off layer 41 formed on the lift-off layer 41 so that the lift-off layer 41 of the first region 7 on which the pattern printing resist 90 is formed remains at the completion of the first semiconductor layer forming step. 51 means that the time and area of contact between the lift-off layer 41 and the etching solution are suppressed.

From the viewpoint of achieving high pattern accuracy and reducing the amount of the pattern printing resist used, the area of the lift-off layer 41 remaining at the completion of the first semiconductor layer forming step is 30% or more of the area where the pattern printing resist 90 is formed. Is more preferable, 50% or more is more preferable, and 70% or more is even more preferable.
If the lift-off layer 41 remains when the first semiconductor layer forming step is completed, the first protective layer 51 does not necessarily remain when the first semiconductor layer forming step is completed, but in order to accurately leave the lift-off layer 41. It is preferable that the first protective layer 51 remains at the completion of the first semiconductor layer forming step. The area of the first protective layer 51 remaining at the completion of the first semiconductor layer forming step is preferably 30% or more, more preferably 50% or more, and 70% or more of the area where the pattern print resist 90 is formed. If it is, it is more preferable.

The area of the region where the pattern print resist 90 is formed and the region where the lift-off layer 41 and the first protective layer 51 remain at the completion of the first semiconductor layer forming step are, for example, after the pattern print resist is formed and after the pattern print resist is peeled off, which will be described later. , The same region can be determined by observing the same region with an optical microscope, a scanning electron microscope, or the like, and measuring the region where the pattern printing resist 90 is formed and the region of the lift-off layer 41 and the first protective layer 51, respectively. ..

Further, it is preferable that the difference between the film thickness of the lift-off layer 41 remaining at the completion of the first semiconductor layer forming step and the film thickness of the lift-off layer 41 immediately after the formation of the lift-off layer 41 is small. This is because the smaller the amount of decrease in film thickness, the smaller the film thickness formed by the lift-off layer 41. Specifically, the film thickness of the lift-off layer 41 remaining at the completion of the first semiconductor layer forming step is preferably 20% or more, more preferably 50% or more of the film thickness immediately after the formation of the lift-off layer 41. More preferably, it is 80% or more.

The ratio of the film thickness of the lift-off layer 41 remaining at the completion of the first semiconductor layer forming step to the film thickness of the lift-off layer 41 and the first protective layer 51 immediately after the formation of the lift-off layer 41 is determined, for example, as follows. Can be done. Two work-in-process products having a lift-off layer 41 formed to have the same film thickness are prepared. The film thickness of the lift-off layer 41 of one of the work-in-process products is measured immediately after the formation of the lift-off layer 41 and the first protective layer 51. A first semiconductor layer forming step is carried out on the other work-in-process, and the film thicknesses of the lift-off layer 41 and the first protective layer 51 are measured after the step is completed. The film thickness ratio can be calculated by comparing the film thicknesses of the two process-in-process products. The film thickness of the lift-off layer 41 and the first protective layer 51 can be measured by observing the cross section of the work-in-process with a scanning microscope or the like. If the film thicknesses of the lift-off layer 41 and the first protective layer 51 are distributed, the film thicknesses of the lift-off layer 41 and the first protective layer 51 are measured at about 10 places for one process-in-process product. Then, the average value may be calculated.

Considering an example here, when hydrofluoric acid (HF) and nitric acid (HNO ₃ ) are used as the etching solution, if the content of hydrofluoric acid is low, even if the etching solution passes through the pattern printing resist 90, the first It is considered that the lift-off layer 41 is protected from the etching solution by setting the protective layer 51 to an appropriate thickness.
Further, when a mixed solution in which ozone is dissolved in hydrofluoric acid is used as the etching solution, the first protective layer 51 not covered with the pattern printing resist 90 can be dissolved. Specifically, ozone (O ₃ ) oxidizes the surface of the first protective layer 51 to SiO ₂ , and hydrofluoric acid (HF) dissolves _{SiO 2.} By repeating this, the first protective layer 51 is dissolved.
On the other hand, in the first protective layer 51 covered with the pattern printing resist 90, ozone is deactivated when passing through the pattern printing resist 90, and the first protective layer 51 is not oxidized. As a result, it is considered that the first protective layer 51 covered with the pattern printing resist 90 does not dissolve even if hydrofluoric acid (HF) passes through the pattern printing resist 90.

Similarly, the second protective layer 53 protects the insulating layer 43 from the etching solution that passes through the pattern printing resist 90.

Then, as shown in FIG. 3D, the pattern printing resist 90 is removed. An inexpensive alkaline solution is used as the etching solution for the pattern printing resist 90.
At this time, the first protective layer 51 on the back surface side is removed by the alkaline solution.
Further, the alkaline solution removes the second protective layer 53 on the light receiving surface side. At this time, the insulating layer 43 protects the intrinsic semiconductor layer 13 from the alkaline solution.

Next, both sides of the semiconductor substrate 11 are cleaned (first cleaning step). In the first cleaning step, for example, ozone treatment is followed by hydrofluoric acid treatment (treatment with hydrofluoric acid or a mixture of hydrofluoric acid and another type of acid).

Next, as shown in FIG. 3E, for example, by using the CVD method, the intrinsic semiconductor layer is formed on the entire surface of the back surface side of the semiconductor substrate 11, specifically on the lift-off layer 41 in the first region 7 and on the second region 8. The material film 33Z and the n-type semiconductor layer material film 35Z are laminated (film-formed) in this order (second semiconductor layer material film forming step).

Next, as shown in FIG. 3F, the intrinsic semiconductor layer material film 33Z and the n-type semiconductor layer in the first region 7 on the back surface side of the semiconductor substrate 11 by using the lift-off method using the lift-off layer (sacrificial layer). The material film 35Z is removed, and a patterned intrinsic semiconductor layer 33 and an n-type semiconductor layer 35 are formed in the second region 8 (second semiconductor layer forming step).

Specifically, by removing the lift-off layer 41, the intrinsic semiconductor layer material film 33Z and the n-type semiconductor layer material film 35Z on the lift-off layer 41 are removed to form the intrinsic semiconductor layer 33 and the n-type semiconductor layer 35. .. As the removal solution for the lift-off layer 41, for example, an acidic solution such as hydrofluoric acid is used.
At this time, the insulating layer 43 on the light receiving surface side of the semiconductor substrate 11 is also removed.

Next, as shown in FIG. 3G, the first electrode layer 27 and the second electrode layer 37 are formed on the back surface side of the semiconductor substrate 11 (electrode layer forming step).
Specifically, for example, a PVD method such as a sputtering method is used to laminate (form) a transparent electrode layer material film on the entire back surface side of the semiconductor substrate 11. After that, the transparent electrode layers 28 and 38 are patterned by removing a part of the transparent electrode layer material film by, for example, an etching method using an etching paste. As the etching solution for the transparent electrode layer material film, for example, hydrochloric acid or an aqueous ferric chloride solution is used.
Then, for example, by forming a metal electrode layer 29 on the transparent electrode layer 28 and forming a metal electrode layer 39 on the transparent electrode layer 38 by using, for example, a pattern printing method or a coating method, the first electrode layer 27 and The second electrode layer 37 is formed.

Next, the optical adjustment layer 15 is formed on the entire surface of the semiconductor substrate 11 on the light receiving surface side.
Through the above steps, the back electrode type solar cell 1 of the present embodiment shown in FIGS. 1 and 2 can be obtained.

As described above, according to the method for manufacturing a solar cell of the present embodiment, in the first semiconductor layer forming step, the p-type semiconductor layer 25 is patterned using a pattern printing resist by the pattern printing method, so that the spin coating method is used. Compared with the case of using the photoresist (photolithography method) according to the above, the steps of exposure and development of the resist can be reduced, and the manufacturing process of the solar cell can be simplified and shortened.
Further, in the second semiconductor layer forming step, the n-type semiconductor layer 35 is patterned by using the lift-off method using the lift-off layer (sacrificial layer), so that the manufacturing process of the solar cell can be simplified and shortened. ..
Further, in the first semiconductor layer forming step, an inexpensive alkaline solution is adopted as the solution for removing the pattern printing resist.
As a result, the cost of the solar cell can be reduced and the productivity can be improved.

Further, according to the method for manufacturing a solar cell of the present embodiment, the first protective layer 51 is formed on the lift-off layer 41 on the back surface side, so that the p-type semiconductor layer 25 is patterned in the first semiconductor layer forming step. At this time, the first protective layer 51 protects the lift-off layer 41 from an etching solution that has passed through a pattern printing resist, for example, a mixed solution in which ozone is dissolved in hydrofluoric acid. As a result, peeling of the lift-off layer 41 is suppressed when the p-type semiconductor layer 25 is patterned.
When removing the pattern printing resist, the first protective layer 51 is naturally removed by a solution for removing the pattern printing resist, for example, an alkaline solution.

Further, according to the method for manufacturing a solar cell of the present embodiment, the insulating layer 43 is formed on the intrinsic semiconductor layer 13 on the light receiving surface side, so that when the pattern print resist is removed in the first semiconductor layer forming step. , The insulating layer 43 protects the intrinsic semiconductor layer 13 from a solution that removes the pattern printing resist, such as an alkaline solution. As a result, the dissolution of the intrinsic semiconductor layer 13 is suppressed, and the deterioration of the performance of the solar cell is suppressed.
The insulating layer 43 is naturally removed by a solution for removing the lift-off layer 41, for example, an acidic solution containing hydrofluoric acid, when the lift-off layer 41 is removed in the second semiconductor layer forming step.

Further, since the second protective layer 53 is formed on the insulating layer 43, when the p-type semiconductor layer 25 is patterned in the first semiconductor layer forming step, the second protective layer 53 is etched through the pattern printing resist. The insulating layer 43 is protected from a solution, for example, a mixed solution of ozone in hydrofluoric acid. As a result, peeling of the insulating layer 43 is suppressed when the p-type semiconductor layer is patterned.
When removing the pattern printing resist, the second protective layer 53 is naturally removed by a solution for removing the pattern printing resist, for example, an alkaline solution.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications and modifications can be made. For example, in the above-described embodiment, the first conductive semiconductor layer 25 is a p-type semiconductor layer and the second conductive semiconductor layer 35 is an n-type semiconductor layer, but the first conductive semiconductor layer 25 is an n-type semiconductor layer. The second conductive type semiconductor layer 35 may be replaced with a p-type semiconductor layer.

Further, in the above-described embodiment, the method for manufacturing the heterozygous solar cell 1 is illustrated as shown in FIG. 2, but the feature of the present invention is not limited to the heterozygous solar cell, but the homozygous solar cell. It can be applied to various methods for manufacturing solar cells such as batteries.

Further, in the above-described embodiment, the n-type semiconductor substrate is exemplified as the semiconductor substrate 11, but the semiconductor substrate 11 is a p-type semiconductor in which a crystalline silicon material is doped with a p-type dopant (for example, the above-mentioned boron (B)). It may be a substrate.

Further, in the above-described embodiment, a solar cell having a crystalline silicon substrate has been exemplified, but the present invention is not limited thereto. For example, a solar cell may have a gallium arsenide (GaAs) substrate.

1,1X Solar cell 7 1st area 7b, 8b Bus bar part 7f, 8f Finger part 8 2nd area 11,11X Semiconductor substrate 13,13X Intrinsic semiconductor layer 15,15X Optical adjustment layer 23,23X Intrinsic semiconductor layer 23Z, 23ZX, 33Z, 33ZX Intrinsic semiconductor layer Material film 25, 25X First conductive semiconductor layer 25Z, 25ZX First conductive semiconductor layer Material film 27, 27X First electrode layer 28, 28X, 38, 38X Transparent electrode layer 29, 29X, 39 , 39X Metal electrode layer 33,33X Intrinsic semiconductor layer 35,35X Second conductive semiconductor layer 35Z, 35ZX Second conductive semiconductor layer Material film 37,37X Second electrode layer 41 Lift-off layer 43 Insulation layer 51 First protective layer 53 Second protective layer

Claims (7)

A semiconductor substrate, a first conductive semiconductor layer and a first electrode layer laminated in order in a first region which is a part of the other main surface side opposite to one main surface side of the semiconductor substrate, and the semiconductor substrate. A method for manufacturing a back electrode type solar cell including a second conductive semiconductor layer and a second electrode layer which are sequentially laminated in a second region which is another part on the other main surface side.
A first semiconductor layer material film forming step of forming a material film of the first conductive type semiconductor layer on the other main surface side of the semiconductor substrate,
A lift-off layer forming step of forming a lift-off layer on the material film of the first conductive semiconductor layer,
A first protective layer forming step of forming a first protective layer for protecting the lift-off layer on the lift-off layer,
By removing the material films of the first protective layer, the lift-off layer, and the first conductive semiconductor layer in the second region using a pattern printing resist, the first pattern is patterned in the first region. A first semiconductor layer forming step of forming the conductive semiconductor layer, the lift-off layer and the first protective layer, and removing the pattern printing resist and the first protective layer in the first region.
A second semiconductor layer material film forming step of forming a material film of the second conductive semiconductor layer on the lift-off layer in the first region and on the second region.
By removing the lift-off layer, the material film of the second conductive semiconductor layer in the first region is removed, and a patterned second conductive semiconductor layer is formed in the second region. Semiconductor layer formation process and
Including
In the first semiconductor layer forming step, the first protective layer in the first region is a solution that protects the lift-off layer in the first region from the solution used for patterning and removes the pattern printing resist. Removed with,
How to manufacture solar cells. The first semiconductor layer forming step is
A step of forming the pattern printing resist on the first protective layer in the first region by using a pattern printing method, and
Using the pattern printing resist as a mask, the material films of the first protective layer, the lift-off layer, and the first conductive semiconductor layer in the second region are etched to pattern the first region. A step of forming the first conductive semiconductor layer, the lift-off layer and the first protective layer, and
A step of removing the pattern printing resist and removing the first protective layer in the first region,
The method for manufacturing a solar cell according to claim 1. The lift-off layer contains a material containing silicon oxide, silicon nitride, or a composite thereof as a main component.
The first protective layer contains a material containing silicon as a main component.
In the first semiconductor layer forming step, the solution used for the patterning contains hydrofluoric acid and contains hydrofluoric acid.
In the first semiconductor layer forming step, the solution for removing the pattern printing resist is an alkaline solution.
The method for manufacturing a solar cell according to claim 1 or 2. In the first protective layer forming step, the first protective layer is formed with a film thickness of 1 nm or more and 50 nm or less.
The method for manufacturing a solar cell according to any one of claims 1 to 3. Before the first semiconductor layer forming step,
A step of forming an intrinsic semiconductor layer on the one main surface side of the semiconductor substrate, and
An insulating layer forming step of forming an insulating layer on the intrinsic semiconductor layer,
A second protective layer forming step of forming a second protective layer that protects the insulating layer on the insulating layer,
Including
In the first semiconductor layer forming step,
The second protective layer is removed with a solution that protects the insulating layer from the solution used for patterning and removes the pattern printing resist.
The insulating layer protects the intrinsic semiconductor layer from a solution that removes the pattern printing resist.
In the second semiconductor layer forming step, the insulating layer is removed with a solution that removes the lift-off layer.
The method for manufacturing a solar cell according to any one of claims 1 to 3. The intrinsic semiconductor layer contains a material containing silicon as a main component, and contains a material containing silicon as a main component.
The lift-off layer and the insulating layer contain a material containing silicon oxide, silicon nitride, or a composite thereof as a main component.
The first protective layer and the second protective layer contain a material containing silicon as a main component, and the first protective layer and the second protective layer contain a material containing silicon as a main component.
In the first semiconductor layer forming step, the solution used for the patterning contains hydrofluoric acid and contains hydrofluoric acid.
In the first semiconductor layer forming step, the solution for removing the pattern printing resist is an alkaline solution.
In the second semiconductor layer forming step, the solution for removing the lift-off layer contains hydrofluoric acid.
The method for manufacturing a solar cell according to claim 5. In the second protective layer forming step, the second protective layer is formed with a film thickness of 1 nm or more and 50 nm or less.
The method for manufacturing a solar cell according to claim 5 or 6.

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