JPWO2019186332A1 - 表示装置の動作方法 - Google Patents
表示装置の動作方法 Download PDFInfo
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- JPWO2019186332A1 JPWO2019186332A1 JP2020510165A JP2020510165A JPWO2019186332A1 JP WO2019186332 A1 JPWO2019186332 A1 JP WO2019186332A1 JP 2020510165 A JP2020510165 A JP 2020510165A JP 2020510165 A JP2020510165 A JP 2020510165A JP WO2019186332 A1 JPWO2019186332 A1 JP WO2019186332A1
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Abstract
Description
本実施の形態では、本発明の一態様である表示装置、及びその動作方法について図面を用いて説明する。
<表示装置の構成例>
本実施の形態では、本発明の一態様の表示装置の構成例について図面を用いて説明する。
図13(A)乃至(C)に、画素の上面図を示す。図13(A)は、ゲート221a及びゲート221bから共通電極123aまでの積層構造を共通電極123a側から見た上面図である。図13(B)は、図13(A)の積層構造から共通電極123aを除いた上面図であり、図13(C)は、図13(A)の積層構造から共通電極123a及び画素電極121を除いた上面図である。
図14に、表示装置の断面図を示す。なお、画素の断面構造については、図13(A)に示す一点鎖線B1−B2間の断面図に相当する。
次に、本実施の形態の表示装置の各構成要素に用いることができる材料等の詳細について、説明を行う。
本実施の形態の表示装置が有するトランジスタの半導体層には、酸化物半導体として機能する金属酸化物を用いることが好ましい。以下では、半導体層に適用可能な金属酸化物について説明する。
本実施の形態では、本発明の一態様で開示されるトランジスタに用いることができるCAC(Cloud−Aligned Composite)−OSの構成について説明する。
本実施の形態では、本発明の一態様の電子機器について図面を用いて説明する。
Claims (11)
- 画素電極及び共通電極を有する表示素子が設けられた画素を有し、前記画素は第1のデータ線、及び第2のデータ線と電気的に接続された表示装置の動作方法であって、
前記第1のデータ線を介した前記画素への第1の電位の供給と、前記第2のデータ線を介した前記画素への第2の電位の供給と、を並行して行った後、前記第2のデータ線を介して前記画素に第3の電位を供給することにより、前記画素に保持された前記第1の電位を前記第4の電位に変化させ、前記第4の電位を前記画素電極に印加し、
前記第2の電位は、前記第1の電位を基に算出される電位であり、
前記第2の電位の値が、前記共通電極に印加される電位以下である場合は、前記第3の電位は、前記共通電極に印加される電位より高く、
前記第2の電位の値が、前記共通電極に印加される前記電位以上である場合は、前記第3の電位は、前記共通電極に印加される前記電位より低い表示装置の動作方法。 - 請求項1において、
前記第3の電位は、前記第1の電位が取り得る最大値以上の電位、又は前記第1の電位が取り得る最小値以下の電位である表示装置の動作方法。 - 請求項1又は2において、
前記表示装置は、ソースドライバ回路を有し、
前記ソースドライバ回路は、前記第1のデータ線と電気的に接続され、
前記ソースドライバ回路は、前記第2のデータ線と電気的に接続され、
前記ソースドライバ回路は、前記第1の電位、及び前記第2の電位を生成する機能を有する表示装置の動作方法。 - 画素電極及び共通電極を有する表示素子が設けられた画素を有し、前記画素は第1のデータ線、及び第2のデータ線と電気的に接続された表示装置の動作方法であって、
前記表示装置は、第1の動作及び第2の動作によって動作し、
前記第1の動作では、前記第1のデータ線を介した前記画素への第1の電位の供給と、前記第2のデータ線を介した前記画素への第2の電位の供給と、を並行して行った後、前記第2のデータ線を介して前記画素に第3の電位を供給することにより、前記画素に保持された前記第1の電位を前記第4の電位に変化させ、前記第4の電位を前記画素電極に印加し、
前記第2の電位は、前記第1の電位を基に算出される、前記共通電極に印加される電位以下の値の電位であり、
前記第3の電位は、前記共通電極に印加される前記電位より高い値の電位であり、
前記第4の電位は、前記共通電極に印加される前記電位以上の値の電位であり、
前記第2の動作では、前記第1のデータ線を介した前記画素への第5の電位の供給と、前記第2のデータ線を介した前記画素への第6の電位の供給と、を並行して行った後、前記第2のデータ線を介して前記画素に第7の電位を供給することにより、前記画素に保持された前記第5の電位を前記第8の電位に変化させ、前記第8の電位を前記画素電極に印加し、
前記第6の電位は、前記第5の電位を基に算出される、前記共通電極に印加される前記電位以上の値の電位であり、
前記第7の電位は、前記共通電極に印加される前記電位より低い値の電位であり、
前記第8の電位は、前記共通電極に印加される前記電位以下の値の電位である表示装置の動作方法。 - 請求項4において、
前記第3の電位は、前記第1の電位が取り得る最大値以上の電位であり、
前記第7の電位は、前記第5の電位が取り得る最小値以上の電位である表示装置の動作方法。 - 請求項4又は5において、
前記第1の電位が取り得る値の範囲と、前記第5の電位が取り得る値の範囲と、は等しい表示装置の動作方法。 - 請求項4乃至6のいずれか一項において、
前記第1の動作による動作と、前記第2の動作による動作と、を1フレーム期間毎に交互に行う表示装置の動作方法。 - 請求項4乃至7のいずれか一項において、
前記表示装置は、ソースドライバ回路を有し、
前記ソースドライバ回路は、前記第1のデータ線と電気的に接続され、
前記ソースドライバ回路は、前記第2のデータ線と電気的に接続され、
前記ソースドライバ回路は、前記第1の電位及び前記第2の電位、並びに前記第5の電位及び前記第6の電位を生成する機能を有する表示装置の動作方法。 - 請求項1乃至8のいずれか一項において、
前記画素は、第1のトランジスタと、第2のトランジスタと、容量素子と、を有し、
前記第1のトランジスタのソース又はドレインの一方は、前記容量素子の一方の電極と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、前記第1のデータ線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの一方は、前記容量素子の他方の電極と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、前記第2のデータ線と電気的に接続されている表示装置の動作方法。 - 請求項9において、
前記第1のトランジスタと、前記第2のトランジスタと、は、チャネル形成領域に金属酸化物を有し、
前記金属酸化物は、Inと、Znと、M(MはAl、Ti、Ga、Sn、Y、Zr、La、Ce、Nd又はHf)と、を有する表示装置の動作方法。 - 請求項1乃至10のいずれか一項において、
前記表示素子は、液晶素子である表示装置の動作方法。
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11271713A (ja) * | 1998-03-19 | 1999-10-08 | Toshiba Corp | 液晶表示装置 |
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US20210005155A1 (en) | 2021-01-07 |
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US11645992B2 (en) | 2023-05-09 |
KR20200128166A (ko) | 2020-11-11 |
JP2023111947A (ja) | 2023-08-10 |
CN111886645A (zh) | 2020-11-03 |
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