JPWO2019017147A1 - 撮像装置および撮像装置の製造方法 - Google Patents
撮像装置および撮像装置の製造方法 Download PDFInfo
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- JPWO2019017147A1 JPWO2019017147A1 JP2019530941A JP2019530941A JPWO2019017147A1 JP WO2019017147 A1 JPWO2019017147 A1 JP WO2019017147A1 JP 2019530941 A JP2019530941 A JP 2019530941A JP 2019530941 A JP2019530941 A JP 2019530941A JP WO2019017147 A1 JPWO2019017147 A1 JP WO2019017147A1
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- 238000003384 imaging method Methods 0.000 title claims abstract description 42
- 238000004519 manufacturing process Methods 0.000 title description 22
- 239000004065 semiconductor Substances 0.000 claims abstract description 118
- 239000000758 substrate Substances 0.000 claims abstract description 116
- 238000006243 chemical reaction Methods 0.000 claims abstract description 32
- 230000008054 signal transmission Effects 0.000 claims abstract description 29
- 238000012546 transfer Methods 0.000 claims description 26
- 238000012545 processing Methods 0.000 claims description 24
- 230000005540 biological transmission Effects 0.000 claims description 11
- 239000010410 layer Substances 0.000 description 107
- 239000010408 film Substances 0.000 description 40
- 238000005516 engineering process Methods 0.000 description 30
- 230000002093 peripheral effect Effects 0.000 description 27
- 238000000034 method Methods 0.000 description 23
- 229910052751 metal Inorganic materials 0.000 description 20
- 239000002184 metal Substances 0.000 description 20
- 238000010586 diagram Methods 0.000 description 16
- 239000010949 copper Substances 0.000 description 11
- 239000000203 mixture Substances 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 238000007689 inspection Methods 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 241000724291 Tobacco streak virus Species 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000011810 insulating material Substances 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 230000004048 modification Effects 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 239000000956 alloy Substances 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000000460 chlorine Substances 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 238000005304 joining Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 239000000523 sample Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000012943 hotmelt Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14634—Assemblies, i.e. Hybrid structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14645—Colour imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/1469—Assemblies, i.e. hybrid integration
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/79—Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors
-
- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/036—Manufacturing methods by patterning a pre-deposited material
- H01L2224/0361—Physical or chemical etching
- H01L2224/03614—Physical or chemical etching by chemical means only
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/038—Post-treatment of the bonding area
- H01L2224/0383—Reworking, e.g. shaping
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05567—Disposition the external layer being at least partially embedded in the surface
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/0557—Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
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- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
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Abstract
Description
1.第1の実施の形態
2.第2の実施の形態
3.第3の実施の形態
4.第4の実施の形態
5.第5の実施の形態
[撮像装置の構成]
図1は、本技術の実施の形態に係る撮像装置の構成例を示す図である。同図の撮像装置1は、撮像素子100と、垂直駆動部2と、カラム信号処理部3と、制御部4とを備える。
図2は、本技術の実施の形態に係る画素回路の構成例を示す図である。同図の画素10は、光電変換部13と、電荷保持部14と、MOSトランジスタ15乃至18とを備える。
図3は、本技術の第1の実施の形態に係る撮像素子の構成例を示す図である。同図の撮像素子100は、入射光伝達部110と、半導体基板120と、配線部130と、支持基板140と、パッド152を備える。
図4乃至7は、本技術の第1の実施の形態に係る撮像素子の製造方法の一例を示す図である。図4乃至7を用いて撮像素子100の製造工程について説明する。まず、半導体基板120にP型のウェル領域を形成し、このウェル領域にN型半導体領域121や画素回路の拡散領域部分を形成する。これらは、例えば、イオン打込みにより行うことができる。次に、ゲート絶縁膜およびゲート電極(不図示)を形成し、絶縁材料139の膜を形成する。この絶縁材料139には、例えば、酸化珪素(SiO2)を使用することができる。次に、ビアプラグ133を形成する。これは、絶縁材料139の膜にビアホールを形成し、このビアホールにタングステン(W)等の金属を充填することにより行うことができる(図4におけるa)。
図8は、本技術の第1の実施の形態に係る信号伝達部の製造方法の一例を示す図である。同図は、信号伝達部であるパッド152の製造工程を表したものであり、図5におけるdの製造工程の詳細を表した図である。
上述の第1の実施の形態では、配線層132およびパッド152の接合部において、配線層132の一部がパッド152に接続されていた。これに対し、本技術の第2の実施の形態では、接合部を流れる電流等に応じて接続面積を変更する点で第1の実施の形態と異なる。
図10は、本技術の第2の実施の形態に係る撮像素子の構成例を示す図である。同図の撮像素子100は、パッド152と配線層132との接合面積が広い点で図3において説明した撮像素子100と異なる。同図におけるaは撮像素子100の断面を表し、同図におけるbはパッド152および配線層132の配置を表した図である。なお、同図におけるbは、撮像素子100の受光面とは反対の面から見た際のパッド152および配線層132の様子を表している。また、同図におけるbの点線は、開口部151を表したものである。
上述の第1の実施の形態では、パッド152に配線層132が直接接続されていた。これに対し、本技術の第3の実施の形態では、ビアプラグ133を介して接続される点で第1の実施の形態と異なる。
図11は、本技術の第3の実施の形態に係る撮像素子の構成例を示す図である。同図におけるaは、撮像素子100の断面図を表す図である。同図におけるaの撮像素子100は、配線層132とパッド152とが1つのビアプラグ133により接続される点で、図3において説明した撮像素子100と異なる。半導体基板120に隣接する絶縁層131の膜厚が比較的厚い場合や配線層132の膜厚が比較的薄い場合には、ビアプラグ133を配線層132およびパッド152の間に配置することにより、配線層132およびパッド152の間隔を調整することができる。
上述の第1の実施の形態では、撮像素子100は、半導体基板120の配線部130に支持基板140が接合されていた。これに対し、本技術の第4の実施の形態では、撮像素子100に配線部を有する半導体基板が接合され、撮像装置が構成される点で、第1の実施の形態と異なる。
図12は、本技術の第4の実施の形態に係る撮像装置の構成例を示す図である。同図の撮像装置1は、図1において説明した周辺回路チップ200と撮像素子100とが接合されて構成されたものである。
上述の第4の実施の形態の撮像装置1は、パッド134および234により撮像素子100および周辺回路チップ200の信号の伝達を行っていた。これに対し、本技術の第5の実施の形態に係る撮像装置1は、半導体基板120を貫通するビアプラグにより信号の伝達を行う点で、第4の実施の形態と異なる。
図13は、本技術の第5の実施の形態に係る撮像装置の構成例を示す図である。同図の撮像装置1は、パッド134および234の代わりにビアプラグ154および155を備える点で、図12において説明した撮像装置1と異なる。ビアプラグ154および155は、半導体基板120を貫通して形成されたビアプラグである。このようなビアプラグは、シリコン貫通ビア(TSV:Through Silicon Via)と称される。ビアプラグ154は、半導体基板120および配線部130を貫通して周辺回路チップ200に到達するTSVである。具体時には、ビアプラグ154は、周辺回路チップ200における配線部230の最外層に配置された絶縁層231の内部に形成されたパッド253と撮像素子100の保護膜113の内部に形成された配線層156との間に形成されて、信号の伝達を行う。また、ビアプラグ155は、配線層156とパッド152との間に形成されて、ビアプラグ154と同様に信号の伝達を行う。
図14は、本技術の第5の実施の形態に係るビアプラグの構成例を示す図である。同図は、パッド152およびビアプラグ155の配置を表した図である。また、図10および11とは異なり、同図は受光面から見た場合の配置を表す。同図におけるaは、図13において説明した撮像装置1におけるパッド152とビアプラグ155との配置を表した図であり、比較的小さい面積のビアプラグ155を配置する場合の例を表した図である。なお、ビアプラグ154および配線層156の記載は省略している。一方、同図におけるbは、環状のビアプラグ155を配置する場合の例を表した図であり、比較的大きな面積のビアプラグ155を配置する場合の例を表した図である。このようなビアプラグ155の面積は、接続抵抗に応じて決定することができる。何れの場合においてもビアプラグ155は、開口部151とパッド152の端部との間に配置される。
上述の第5の実施の形態に係る撮像装置1は、ビアプラグ154および155の複数のTSVを使用してチップ間における信号の伝達を行っていたが、1つのビアプラグにより信号の伝達を行うこともできる。
図15は、本技術の第5の実施の形態の変形例に係る撮像装置の構成例を示す図である。同図の撮像装置1は、ビアプラグ154および155ならびに配線層156の代わりにビアプラグ157を備える点で、図13において説明した撮像装置1と異なる。
(1)照射された光に応じた画像信号を生成する光電変換部が形成される半導体基板と、
前記半導体基板における前記光が照射される面である受光面とは異なる面に絶縁層と前
記生成された画像信号を伝達する配線層とが順に積層されて構成された配線部と、
前記半導体基板の前記受光面とは異なる面に形成された凹部と前記配線部との間に形成されるとともに前記凹部に一部が配置され、前記配線層により伝達された画像信号を前記半導体基板の前記受光面から前記凹部に向けて形成された開口部を介して伝達する信号伝達部と
を具備する撮像装置。
(2)前記受光面に隣接して配置されて前記照射された光を前記光電変換部に伝達する入射光伝達部をさらに具備し、
前記信号伝達部は、前記入射光伝達部が形成された後に形成される前記開口部を介して前記画像信号を伝達する
前記(1)に記載の撮像装置。
(3)前記信号伝達部は、パッドにより構成される前記(1)または(2)に記載の撮像装置。
(4)前記配線層および前記信号伝達部の間に配置されて前記画像信号を伝達するビアプラグをさらに具備する前記(1)から(3)の何れかに記載の撮像装置。
(5)前記配線層により伝達される画像信号を処理する処理回路が形成される第2の半導体基板と、
前記第2の半導体基板に第2の絶縁層と前記処理された画像信号を伝達する第2の配線層とが順に積層された第2の配線部と、
前記第2の配線層により伝達される前記処理された画像信号を前記信号伝達部に伝達する第2の信号伝達部と
をさらに具備し、
前記信号伝達部は、前記処理回路により処理されて前記第2の信号伝達部により伝達される画像信号を伝達する
前記(1)から(4)の何れかに記載の撮像装置。
(6)前記第2の信号伝達部は、前記配線部および前記第2の配線部にそれぞれ配置されたパッドにより構成される前記(5)に記載の撮像装置。
(7)前記第2の信号伝達部は、前記配線部および前記半導体基板を貫通して配置されるビアプラグにより構成される前記(5)に記載の撮像装置。
(8)照射された光に応じた画像信号を生成する光電変換部が形成される半導体基板における前記光が照射される面である受光面とは異なる面に形成された凹部に前記画像信号を伝達する信号伝達部の一部を形成する信号伝達部形成工程と、
前記光電変換部により生成された画像信号の前記信号伝達部への伝達を行う配線層を前記半導体基板の前記受光面とは異なる面および前記信号伝達部に隣接して形成する配線部形成工程と、
前記半導体基板の前記受光面から前記凹部に向けて前記信号伝達部からの信号を伝達するための開口部を形成する開口部形成工程と
を具備する撮像装置の製造方法。
2 垂直駆動部
3 カラム信号処理部
4 制御部
10 画素
13 光電変換部
14 電荷保持部
100 撮像素子
110 入射光伝達部
111 オンチップレンズ
112 カラーフィルタ
113 保護膜
120 半導体基板
122、135 凹部
130、156、230 配線部
131、231 絶縁層
132、232 配線層
133、154、155、157、233 ビアプラグ
134、152、234、253 パッド
140 支持基板
151 開口部
153 ボンディングワイヤ
200 周辺回路チップ
220 半導体基板
Claims (8)
- 照射された光に応じた画像信号を生成する光電変換部が形成される半導体基板と、
前記半導体基板における前記光が照射される面である受光面とは異なる面に絶縁層と前記生成された画像信号を伝達する配線層とが順に積層されて構成された配線部と、
前記半導体基板の前記受光面とは異なる面に形成された凹部と前記配線部との間に形成されるとともに前記凹部に一部が配置され、前記配線層により伝達された画像信号を前記半導体基板の前記受光面から前記凹部に向けて形成された開口部を介して伝達する信号伝達部と
を具備する撮像装置。 - 前記受光面に隣接して配置されて前記照射された光を前記光電変換部に伝達する入射光伝達部をさらに具備し、
前記信号伝達部は、前記入射光伝達部が形成された後に形成される前記開口部を介して前記画像信号を伝達する
請求項1記載の撮像装置。 - 前記信号伝達部は、パッドにより構成される請求項1記載の撮像装置。
- 前記配線層および前記信号伝達部の間に配置されて前記画像信号を伝達するビアプラグをさらに具備する請求項1記載の撮像装置。
- 前記配線層により伝達される画像信号を処理する処理回路が形成される第2の半導体基板と、
前記第2の半導体基板に第2の絶縁層と前記処理された画像信号を伝達する第2の配線層とが順に積層された第2の配線部と、
前記第2の配線層により伝達される前記処理された画像信号を前記信号伝達部に伝達する第2の信号伝達部と
をさらに具備し、
前記信号伝達部は、前記処理回路により処理されて前記第2の信号伝達部により伝達される画像信号を伝達する
請求項1記載の撮像装置。 - 前記第2の信号伝達部は、前記配線部および前記第2の配線部にそれぞれ配置されたパッドにより構成される請求項5記載の撮像装置。
- 前記第2の信号伝達部は、前記配線部および前記半導体基板を貫通して配置されるビアプラグにより構成される請求項5記載の撮像装置。
- 照射された光に応じた画像信号を生成する光電変換部が形成される半導体基板における前記光が照射される面である受光面とは異なる面に形成された凹部に前記画像信号を伝達する信号伝達部の一部を形成する信号伝達部形成工程と、
前記光電変換部により生成された画像信号の前記信号伝達部への伝達を行う配線層を前記半導体基板の前記受光面とは異なる面および前記信号伝達部に隣接して形成する配線部形成工程と、
前記半導体基板の前記受光面から前記凹部に向けて前記信号伝達部からの信号を伝達するための開口部を形成する開口部形成工程と
を具備する撮像装置の製造方法。
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CN110870071A (zh) | 2020-03-06 |
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