JPS6486241A - Information processor - Google Patents

Information processor

Info

Publication number
JPS6486241A
JPS6486241A JP63068482A JP6848288A JPS6486241A JP S6486241 A JPS6486241 A JP S6486241A JP 63068482 A JP63068482 A JP 63068482A JP 6848288 A JP6848288 A JP 6848288A JP S6486241 A JPS6486241 A JP S6486241A
Authority
JP
Japan
Prior art keywords
instruction
fetching
address
reading
writing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63068482A
Other languages
Japanese (ja)
Inventor
Shinya Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63068482A priority Critical patent/JPS6486241A/en
Publication of JPS6486241A publication Critical patent/JPS6486241A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To continuously activate a pre-fetching cycle by determining whether or not a pre-fetching request is executed by the next address of a writing address to write a pre-fetched instruction and the reading address from a reading pointer. CONSTITUTION:When a pre-fetching instruction is written while only one instruction is idle at a queue register 61, a second writing pointer 64 shows the address after a first writing pointer 62 to show a writing address is updated. When the address of a reading pointer 63 is kept as it is when the instruction reading of an executing part is not executed. Consequently, a pre-fetching request preparing circuit 66, when the pre-fetching instruction is written, takes down the instruction pre-fetching request to a bus access control part. When there is room for the queue register 61, the instruction pre-fetching request occurs as it is and an instruction pre-fetching cycle can be continuously activated.
JP63068482A 1987-06-02 1988-03-22 Information processor Pending JPS6486241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63068482A JPS6486241A (en) 1987-06-02 1988-03-22 Information processor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP13914687 1987-06-02
JP63068482A JPS6486241A (en) 1987-06-02 1988-03-22 Information processor

Publications (1)

Publication Number Publication Date
JPS6486241A true JPS6486241A (en) 1989-03-30

Family

ID=26409702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63068482A Pending JPS6486241A (en) 1987-06-02 1988-03-22 Information processor

Country Status (1)

Country Link
JP (1) JPS6486241A (en)

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