JPS6482833A - Digital synchronizing multiplexing transmission system - Google Patents

Digital synchronizing multiplexing transmission system

Info

Publication number
JPS6482833A
JPS6482833A JP24112587A JP24112587A JPS6482833A JP S6482833 A JPS6482833 A JP S6482833A JP 24112587 A JP24112587 A JP 24112587A JP 24112587 A JP24112587 A JP 24112587A JP S6482833 A JPS6482833 A JP S6482833A
Authority
JP
Japan
Prior art keywords
transmission line
multiplexing
line code
synchronizing
order group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24112587A
Other languages
Japanese (ja)
Inventor
Toshikazu Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24112587A priority Critical patent/JPS6482833A/en
Publication of JPS6482833A publication Critical patent/JPS6482833A/en
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To easily attain the digital synchronizing multiplexing with a simple circuit by synchronizing, multiplexing and transmitting to a one-series high-order group digital signal after an M series low-order group digital signal is code- converted to a transmission line code respectively independently. CONSTITUTION:The low-order group digital signal inputted to input terminals 1a, 1b, 1c and 1d is stuffed and converted to a transmission line code with transmission line code converting circuits 2a, 2b, 2c and 2d respectively. Encoded low-order group signals 3a, 3b, 3c and 3d applicable to the transmission line by respective transmission line code converting circuits 2a, 2b, 2c and 2d are synchronized and multiplexed by a synchronizing multiplexing circuit 4 and the multiplexing signal is sent from an output terminal 5. The stuffing and transmission line code conversion are execute at 140MHz by the method and at the frequency of about 1/4, the processing is executed.
JP24112587A 1987-09-25 1987-09-25 Digital synchronizing multiplexing transmission system Pending JPS6482833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24112587A JPS6482833A (en) 1987-09-25 1987-09-25 Digital synchronizing multiplexing transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24112587A JPS6482833A (en) 1987-09-25 1987-09-25 Digital synchronizing multiplexing transmission system

Publications (1)

Publication Number Publication Date
JPS6482833A true JPS6482833A (en) 1989-03-28

Family

ID=17069657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24112587A Pending JPS6482833A (en) 1987-09-25 1987-09-25 Digital synchronizing multiplexing transmission system

Country Status (1)

Country Link
JP (1) JPS6482833A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002084936A1 (en) * 2001-04-13 2002-10-24 Fujitsu Limited Transmitting apparatus and receiving apparatus

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5731247A (en) * 1980-08-01 1982-02-19 Hitachi Ltd Multiplexing tramsmission system
JPS5741049A (en) * 1980-08-25 1982-03-06 Fujitsu Ltd Monitoring system of pulse code modulation multiplex device
JPS62111540A (en) * 1985-11-09 1987-05-22 Nec Corp Digital multiple converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5731247A (en) * 1980-08-01 1982-02-19 Hitachi Ltd Multiplexing tramsmission system
JPS5741049A (en) * 1980-08-25 1982-03-06 Fujitsu Ltd Monitoring system of pulse code modulation multiplex device
JPS62111540A (en) * 1985-11-09 1987-05-22 Nec Corp Digital multiple converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002084936A1 (en) * 2001-04-13 2002-10-24 Fujitsu Limited Transmitting apparatus and receiving apparatus

Similar Documents

Publication Publication Date Title
JPS5731247A (en) Multiplexing tramsmission system
JPS58153434A (en) Multiplexing system
CA2024809A1 (en) Digital signal multiplexing apparatus and demultiplexing apparatus
JPS55110448A (en) Digital signal transmission system
EP0280574A3 (en) Method and apparatus for predictive coding
US3842401A (en) Ternary code error detector for a time-division multiplex, pulse-code modulation system
JPS6482833A (en) Digital synchronizing multiplexing transmission system
US4731834A (en) Adaptive filter including signal path compensation
EP0393514A3 (en) Channel access system
DE3273485D1 (en) Differential pulse code modulation transmission system
EP0142620A3 (en) System for compensating signal errors in a pcm audio transmission
JPS5792985A (en) High-efficiency forecast encoding device
AU561497B2 (en) Differential pcm transmission
JPS54150013A (en) Digital signal transmission system
JPS57143947A (en) Optical fiber picture transmitter
SU788420A1 (en) Information transmission system
GB2130054A (en) Apparatus for converting transmitting and reconverting a sampled signal
JPS54146515A (en) Digital coding transmission system
JPS56110142A (en) Bus extention device
JPS6490627A (en) Optical space transmitter by time division multiplex system
JPS57157660A (en) Signal transmission system
JPS6436239A (en) Multiplex transmission equipment
JPS644132A (en) Multi-frame transmission system
JPS5631247A (en) Communication system
JPS6471348A (en) Signal processing circuit