JPS5631247A - Communication system - Google Patents

Communication system

Info

Publication number
JPS5631247A
JPS5631247A JP10696579A JP10696579A JPS5631247A JP S5631247 A JPS5631247 A JP S5631247A JP 10696579 A JP10696579 A JP 10696579A JP 10696579 A JP10696579 A JP 10696579A JP S5631247 A JPS5631247 A JP S5631247A
Authority
JP
Japan
Prior art keywords
signal
sub
main
clock
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10696579A
Other languages
Japanese (ja)
Inventor
Yasuo Nagai
Sadao Ifukuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10696579A priority Critical patent/JPS5631247A/en
Publication of JPS5631247A publication Critical patent/JPS5631247A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/12—Arrangements providing for calling or supervisory signals
    • H04J3/125—One of the channel pulses or the synchronisation pulse is also used for transmitting monitoring or supervisory signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To transmit the main signal and the sub-signal simultaneously to utilize the transmission line effectively, by superposing the sub-signal consisting of the digital signal onto the idle time slot of the main signal and by transmitting them. CONSTITUTION:The signal obtained by inputting the sub-signal and the clock signal to AND circuit 4 and the main signal are input to OR circuit 5, and the sub-signal consisting of the digital signal is superposed onto the idle time slot of the main signal, and they are transmitted from transmission unit 6 to receiving unit 8 through transmission line 7. The signal received by receiving unit 8 is input to timing extracting circuit 9 and flip-flop 11. Timing signal components are extracted from the receiving signal by timing extracting circuit 9, and the clock signal for main signal discrimination and the clock for sub-signal discrimination which is the inverted signal of the clock signal above are output to flip-flops 11 and 12.
JP10696579A 1979-08-22 1979-08-22 Communication system Pending JPS5631247A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10696579A JPS5631247A (en) 1979-08-22 1979-08-22 Communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10696579A JPS5631247A (en) 1979-08-22 1979-08-22 Communication system

Publications (1)

Publication Number Publication Date
JPS5631247A true JPS5631247A (en) 1981-03-30

Family

ID=14447024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10696579A Pending JPS5631247A (en) 1979-08-22 1979-08-22 Communication system

Country Status (1)

Country Link
JP (1) JPS5631247A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024664A (en) * 1983-03-29 1985-02-07 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Bus interface unit
JPS61158237A (en) * 1984-12-28 1986-07-17 Sony Corp Data communication method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024664A (en) * 1983-03-29 1985-02-07 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Bus interface unit
JPS61158237A (en) * 1984-12-28 1986-07-17 Sony Corp Data communication method
JPH0574974B2 (en) * 1984-12-28 1993-10-19 Sony Corp

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