JPS6482240A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPS6482240A
JPS6482240A JP62238857A JP23885787A JPS6482240A JP S6482240 A JPS6482240 A JP S6482240A JP 62238857 A JP62238857 A JP 62238857A JP 23885787 A JP23885787 A JP 23885787A JP S6482240 A JPS6482240 A JP S6482240A
Authority
JP
Japan
Prior art keywords
memory
error
controller
disk
diagnosis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62238857A
Other languages
Japanese (ja)
Inventor
Junichi Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Computer Engineering Corp
Original Assignee
Toshiba Corp
Toshiba Computer Engineering Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Computer Engineering Corp filed Critical Toshiba Corp
Priority to JP62238857A priority Critical patent/JPS6482240A/en
Publication of JPS6482240A publication Critical patent/JPS6482240A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To control a disk even in case of the occurrence of cache memory self-diagnosis error by providing an FF which is set when error is detected as the result of self-diagnosis of a disk controller. CONSTITUTION:When error occurs when a disk controller 2 self-diagnosis a cache memory 1, the controller 2 sets a cache error FF 6 and the occurrence of error is stored. When receiving a cache access command from a host computer 5, the controller 2 refers to the FF 6 and reports error of the memory 1 to the host computer 5 because of set of the FF 6. Then, the computer 5 designates the cache memory off mode to the controller 2 to invalidate the function of the memory 1 and directly transfers data to the disk without passing the memory 1. Consequently, the memory 1 is invalidated to control the disk without losing the function of the controller 2 even at the time of generating self-diagnosis error of the memory 1.
JP62238857A 1987-09-25 1987-09-25 Information processing system Pending JPS6482240A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62238857A JPS6482240A (en) 1987-09-25 1987-09-25 Information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62238857A JPS6482240A (en) 1987-09-25 1987-09-25 Information processing system

Publications (1)

Publication Number Publication Date
JPS6482240A true JPS6482240A (en) 1989-03-28

Family

ID=17036292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62238857A Pending JPS6482240A (en) 1987-09-25 1987-09-25 Information processing system

Country Status (1)

Country Link
JP (1) JPS6482240A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07334424A (en) * 1994-06-08 1995-12-22 Nec Corp Hard disk unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07334424A (en) * 1994-06-08 1995-12-22 Nec Corp Hard disk unit

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