JPH07334424A - Hard disk unit - Google Patents

Abstract

PURPOSE:To utilize a hard disk unit having a write cache function without losing data without executing processing for transferring data from the hard disk unit to a CPU or processing for storing data written in a write cache memory by a preceding write command. CONSTITUTION:At the time of detecting the disappearance of a usable automatic alternate sector, an automatic alternative sector managing circuit 4 outputs a write cache off informing signal to a write cache control circuit 3. At the time of inputting the write cache off informing signal from the circuit 4, the circuit 3 give a write cache off instruction from an AND gate to a pass selector 13 in a CPU interface circuit 1 and a write control circuit 31. The circuit 31 turns off a write cache function in accordance with the instruction from the AND gate 32.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hard disk unit, and more particularly to write cache control of a hard disk unit used in a computer.

[0002]

2. Description of the Related Art Conventionally, in write cache control of a hard disk unit, as shown in FIG. 2, write data from a CPU (not shown) is written in a write cache memory (not shown) in a CPU interface (I / F) circuit 6. ), And then write to the disk enclosure (disk medium) 2.

That is, the CPU sends write data to the CPU interface circuit 6 following the write command, and when the write data is accumulated in the write cache memory, the data write process for the disk enclosure 2 is completed.

Here, the CPU interface circuit 6 is C
It has a function of analyzing a write command from the PU to the hard disk unit and a write cache memory for accumulating write data from the CPU to the hard disk unit.

The data stored in the write cache memory of the CPU interface circuit 6 is transferred to the disk enclosure 2 and written therein under the control of the write cache control circuit 7.

When a write error occurs during data writing to the disk enclosure 2, the write data is written in the automatic alternative sector (not shown) in the disk enclosure 2 managed by the automatic alternative sector management circuit 8.

[0007]

In the above-mentioned conventional write cache control of the hard disk unit, data is written in all the automatic alternative sectors in the disk enclosure by the above processing, and the automatic alternative sectors that can be used in the disk enclosure are When it disappears, the write operation to the disk enclosure does not complete, so
Write data to the disk enclosure remains stored in the write cache memory.

At this time, the data write process of the CPU is C
Since it ends normally by accumulating the write data in the write cache memory in the PU interface circuit,
The CPU cannot recognize that a write error has occurred in the disk enclosure until the next command is issued.

When the CPU issues the next command to the CPU interface circuit in the state where there is no available automatic alternative sector and the data to be written in the disk enclosure remains in the write cache memory,
The interface circuit reports that there was a write error
Notify U.

In this case, the data written in the write cache memory by the immediately preceding write command will be lost unless the CPU is added with the processing for sucking the data from the hard disk unit.

On the other hand, if the data written in the write cache memory by the last write command is held until the CPU issues the next command to the hard disk unit, the CPU sucks the data from the hard disk unit. No additional processing is needed.

Therefore, the software developed for a hard disk unit without a write cache memory cannot use the hard disk unit without losing data unless one of the above processes is performed.

Therefore, an object of the present invention is to solve the above problems and perform a process of sucking data from the hard disk unit to the CPU or a process of holding the data written in the write cache memory by the immediately preceding write command. It is to provide a hard disk unit that can be used without any loss of data.

[0014]

A hard disk unit according to the present invention has a write cache function of writing write data from a host device held in a cache memory to a disk medium, and a write cache function when a write error occurs in the disk medium. A hard disk unit including a function of writing data to an alternative area, comprising means for turning off the write cache function when it is detected that the alternative area is exhausted.

Another hard disk unit of the present invention is
A write cache control circuit for writing the write data from the host device held in the cache memory to the disk medium, and an automatic alternative area management circuit for controlling the write data to be written to the alternative area when a write error to the disk medium occurs. A hard disk unit including and
Instructing means for instructing to prohibit writing of the write data held in the cache memory to the disk medium when the automatic alternative area management circuit detects that the alternative area is exhausted, and an instruction of the instructing means In response to the write cache control circuit, the write cache control circuit prohibits writing of write data in the cache memory to the disk medium.

Another hard disk unit of the present invention is
In addition to the above-mentioned configuration, there is provided means for directly sending write data from the host device to the disk medium in response to an instruction from the instruction means.

[0017]

When a write error occurs while the write data stored in the write cache memory is being written to the disk enclosure, the write data is written in the automatic alternate sector by the automatic alternate sector management circuit.

When there is no available automatic substitute sector due to the writing to this automatic substitute sector, the automatic substitute sector management circuit outputs a write cache off notification signal to the write cache control circuit.

When the write cache off notification signal is input to the write cache control circuit, the AND gate instructs the path selector of the CPU interface circuit and the write control circuit to turn off the write cache. The write control circuit turns off the write cache function in response to the write cache off instruction from the AND gate.

As a result, even if a write error occurs in the state where there is no automatic alternative sector, the write error can be notified during the data write processing of the CPU, so that the write cache memory can store the write data to the disk enclosure. It does not remain accumulated.

Therefore, the CPU can recognize that a write error has occurred in the disk enclosure without waiting for the next command to be issued, so that the data written to the write cache memory by the write command is lost. There is no.

[0022]

An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, a hard disk unit according to an embodiment of the present invention is shown as a CPU interface (I / I
F) It is composed of a circuit 1, a disk enclosure 2, a write cache control circuit 3, and an automatic alternative sector management circuit 4.

The CPU interface circuit 1 is a C (not shown).
An analysis / interface (IF) circuit 11 for analyzing commands and passing data from the PU, and a write cache memory 12 for storing write data from the CPU
And a path selector 13 for connecting a data path with the disk enclosure 2 to a data path with the analysis / interface circuit 11 or a data path with the write cache memory 12.

The write cache control circuit 3 responds to the write control circuit 31 for controlling the writing of write data to the disk enclosure 2 and the write cache off notification signal 5 from the automatic alternate sector management circuit 4 to write by the write control circuit 31. An AND gate 32 for turning off the cache function is included.

Write cache control according to an embodiment of the present invention will be described with reference to FIG.

When a command is sent from the CPU, the analysis / interface circuit 11 of the CPU interface circuit 1 analyzes the command, and if the analysis result is a write command for the disk enclosure 2, the write cache control circuit 3 indicates that fact. To notify.

If the analysis result is a write command for the disk enclosure 2, the analysis / interface circuit 11 stores the write data from the CPU in the write cache memory 12. When the analysis / interface circuit 11 stores the write data from the CPU in the write cache memory 12, it ends the data write of the CPU.

The write control circuit 31 of the write cache control circuit 3 controls writing of write data to the disk enclosure 2 when the analysis result from the analysis / interface circuit 11 is a write command.

Here, the write control circuit 31 has a write cache function of writing the write data from the CPU to the disk enclosure 2 via the write cache memory 12, and the write data from the CPU without passing through the write cache memory 12 to the disk. It has a function of writing to the enclosure 2, and those functions are performed by the AND gate 32.
It is selectively performed according to the instruction from.

In this case, since the write cache OFF is not instructed from the AND gate 32, the write control circuit 31 causes the CPU accumulated in the write cache memory 12 to operate.
The write data from the disk is controlled to be written in the disk enclosure 2.

Further, the path selector 13 of the CPU interface circuit 1 switches the data path by AND gate 32.
The write data from the CPU is transferred to the disk enclosure 2 via the write cache memory 12 or the write data from the CPU is transferred to the disk enclosure 2 without passing through the write cache memory 12. Transfer to.

In this case, since the write cache OFF is not instructed from the AND gate 32, the path selector 1
3 is C input via the write cache memory 12
The write data from the PU is transferred to the disk enclosure 2.

When a write error occurs while the write data stored in the write cache memory 12 is being written to the disk enclosure 2, the automatic alternative sector management circuit 4 uses the write data for the automatic alternative sector. It works like writing to.

When data is written to this automatic alternative sector, the automatic alternative sector management circuit 4 counts the number of used automatic alternative sectors or the number of available automatic alternative sectors by a counter circuit (not shown). .

When the automatic substitute sector management circuit 4 detects that there is no available automatic substitute sector by the counter circuit, it outputs the write cache off notification signal 5 to the write cache control circuit 3.

The write cache control circuit 3 sends a write cache off notification signal 5 from the automatic alternative sector management circuit 4.
Is input, the AND gate 32 is added to the path selector 13 and the write control circuit 31 of the CPU interface circuit 1.
Instructs the write cache to be turned off.

The write control circuit 31 turns off the write cache function in response to the instruction from the AND gate 32, and C
Write data from the PU write cache memory 12
Switch to the function of writing to the disk enclosure 2 without going through.

Further, the path selector 13 switches the connection of the data path in response to an instruction from the AND gate 32, and the CPU is input without passing through the write cache memory 12.
The write data from the disk is transferred to the disk enclosure 2.

As a result, the write data from the CPU is transferred to and written in the disk enclosure 2 without passing through the write cache memory 12, and the write operation is the same as in the conventional hard disk unit having no write cache function.

Therefore, even if a write error occurs in the state where there is no automatic alternative sector, the write error can be notified during the data write process of the CPU, so that the write data to the disk enclosure 2 is written to the write cache memory 12. Does not remain accumulated.

Therefore, the CPU can recognize that the write error has occurred in the disk enclosure 2 without waiting until the next command is issued.
The write command does not cause the data written in the write cache memory 12 to disappear.

As described above, the write cache function is turned off when the number of available automatic alternative sectors becomes 0, and the write data from the CPU is not stored in the write cache memory 12 and the disk enclosure 2
By directly transferring the data to and writing the data to the HDD, the retry can be performed during the data write processing from the CPU, so that the processing of sucking the data from the hard disk unit is unnecessary.

Further, since the CPU does not need to hold the data until the next data write is normally completed, the hard disk unit having the write cache function can be used without data loss.

Further, by turning off the write cache function when the number of available automatic alternative sectors becomes 0, the CPU is notified that write errors occur frequently.
Can be notified to alert that the hard disk unit is not in good use.

In the above processing operation, the alternative unit in the disk enclosure 2 is the sector unit, but the alternative unit can be the track unit.

In this way, by turning off the write cache function of the write cache control circuit 3 when there are no available automatic alternative sectors, the process of sucking data from the hard disk unit to the CPU or the write command immediately before is written. Cache memory 1
It is possible to use the data written in No. 2 without performing a process of retaining the data and without losing the data.

[0048]

As described above, according to the present invention, the hard disk unit is turned off by turning off the write cache function when it is detected that the alternative area for writing the write data is exhausted when a write error occurs. The hard disk unit having the write cache function can be used without loss of data without performing a process of sucking data from the CPU to the CPU or a process of holding the data written in the write cache memory by the immediately preceding write command. There is an effect.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional example.

[Explanation of symbols]

 1 CPU Interface Circuit 2 Disk Enclosure 3 Write Cache Control Circuit 4 Automatic Substitute Sector Management Circuit 11 Analysis / Interface Circuit 12 Write Cache Memory 13 Path Selector 31 Write Control Circuit 32 AND Gate

Claims (3)

[Claims] 1. A write cache function for writing write data from a host device held in a cache memory to a disk medium, and a function for writing the write data to an alternative area when a write error to the disk medium occurs. A hard disk unit, comprising a means for turning off the write cache function when it is detected that the alternative area is exhausted. 2. A write cache control circuit for writing write data from a host device held in a cache memory to a disk medium, and a write cache control circuit for writing the write data to an alternative area when a write error to the disk medium occurs. A hard disk unit including an automatic alternative area management circuit, wherein the write data held in the cache memory is written to the disk medium when the automatic alternative area management circuit detects that the alternative area is exhausted. A hard disk comprising: an instruction unit for instructing prohibition; and a unit for prohibiting the write cache control circuit from writing the write data of the cache memory to the disk medium in response to the instruction of the instruction unit. unit. 3. The hard disk unit according to claim 2, further comprising means for directly sending write data from the host device to the disk medium in response to an instruction from the instruction means.