JPS6478499A - Memory element with check circuit - Google Patents
Memory element with check circuitInfo
- Publication number
- JPS6478499A JPS6478499A JP62235296A JP23529687A JPS6478499A JP S6478499 A JPS6478499 A JP S6478499A JP 62235296 A JP62235296 A JP 62235296A JP 23529687 A JP23529687 A JP 23529687A JP S6478499 A JPS6478499 A JP S6478499A
- Authority
- JP
- Japan
- Prior art keywords
- word lines
- lines
- error signal
- coupled
- word
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE:To enable a prescribed operation in response to an error signal by outputting respective bit errors caused by faults in respective word lines as said error signal discriminated with the respective word lines. CONSTITUTION:Respective word lines from a word line driving circuit 4 are constituted with a couple or word lines WL1 and WL1', and a couple of WL2, WL2', and others, and bit data b1-b8 is generated by the combination of these lines; these coupled word lines are activated simultaneously. To the end of the lines other than the end where the word line driving circuit 4 for the coupled word lines is provided, comparators 111, 112 to compare the coupled word lines with each other are provided, so that whether the respective word lines operates normally or not is checked. In case either of the lines does not operate normally, a dissidence signal is generated, which is latched by a buffer as an error signal. In such a way, the occurrence of a faulty word line is immediately checked.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62235296A JPS6478499A (en) | 1987-09-19 | 1987-09-19 | Memory element with check circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62235296A JPS6478499A (en) | 1987-09-19 | 1987-09-19 | Memory element with check circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6478499A true JPS6478499A (en) | 1989-03-23 |
Family
ID=16984012
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62235296A Pending JPS6478499A (en) | 1987-09-19 | 1987-09-19 | Memory element with check circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6478499A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03134888A (en) * | 1989-10-20 | 1991-06-07 | Fujitsu Ltd | Semiconductor memory device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59153183A (en) * | 1983-02-22 | 1984-09-01 | Nippon Telegr & Teleph Corp <Ntt> | Integrated circuit |
JPS60182741A (en) * | 1984-02-29 | 1985-09-18 | Fujitsu Ltd | Integrated circuit |
-
1987
- 1987-09-19 JP JP62235296A patent/JPS6478499A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59153183A (en) * | 1983-02-22 | 1984-09-01 | Nippon Telegr & Teleph Corp <Ntt> | Integrated circuit |
JPS60182741A (en) * | 1984-02-29 | 1985-09-18 | Fujitsu Ltd | Integrated circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03134888A (en) * | 1989-10-20 | 1991-06-07 | Fujitsu Ltd | Semiconductor memory device |
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