JPS6476594A - Shift register circuit - Google Patents

Shift register circuit

Info

Publication number
JPS6476594A
JPS6476594A JP62234627A JP23462787A JPS6476594A JP S6476594 A JPS6476594 A JP S6476594A JP 62234627 A JP62234627 A JP 62234627A JP 23462787 A JP23462787 A JP 23462787A JP S6476594 A JPS6476594 A JP S6476594A
Authority
JP
Japan
Prior art keywords
shift register
reset
circuit
signal
reset circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62234627A
Other languages
Japanese (ja)
Inventor
Yasuhiro Enomoto
Mitsuhiro Okamoto
Yasubumi Takahashi
Yukio Otaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP62234627A priority Critical patent/JPS6476594A/en
Publication of JPS6476594A publication Critical patent/JPS6476594A/en
Pending legal-status Critical Current

Links

Landscapes

  • Shift Register Type Memory (AREA)

Abstract

PURPOSE:To simplify a shift register circuit and to reduce the occupying area of a wiring part by adding a reset circuit, transmitting data directly to a rear stage and resetting respective shift register stages. CONSTITUTION:Four shift register clock input signals generated by inputting an external clock CK signal to a reset circuit 10 to consist of an AND gate and an inverter are respectively inputted to respective try state buffers 1 of a shift register circuit 102 and shift register action is executed. When a reset signal is inputted, the shift register clock input signal constitutes a form that all the shift register stages transmit input data directly to the rear stage and the shift register is all reset. Thus, the reset circuit of the shift register can be simplified and the occupying area can be made smaller.
JP62234627A 1987-09-18 1987-09-18 Shift register circuit Pending JPS6476594A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62234627A JPS6476594A (en) 1987-09-18 1987-09-18 Shift register circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62234627A JPS6476594A (en) 1987-09-18 1987-09-18 Shift register circuit

Publications (1)

Publication Number Publication Date
JPS6476594A true JPS6476594A (en) 1989-03-22

Family

ID=16973999

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62234627A Pending JPS6476594A (en) 1987-09-18 1987-09-18 Shift register circuit

Country Status (1)

Country Link
JP (1) JPS6476594A (en)

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