JPS6476246A - System for testing common bus - Google Patents

System for testing common bus

Info

Publication number
JPS6476246A
JPS6476246A JP62234094A JP23409487A JPS6476246A JP S6476246 A JPS6476246 A JP S6476246A JP 62234094 A JP62234094 A JP 62234094A JP 23409487 A JP23409487 A JP 23409487A JP S6476246 A JPS6476246 A JP S6476246A
Authority
JP
Japan
Prior art keywords
common bus
data
output control
input
high order
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62234094A
Other languages
Japanese (ja)
Inventor
Mitsuru Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62234094A priority Critical patent/JPS6476246A/en
Publication of JPS6476246A publication Critical patent/JPS6476246A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain the trouble retrieval of a common bus interface part by providing the turning back function of data in respective input and output control devices and executing the DMA transferring of the data with a high order device and all the input and output control devices under the high order device. CONSTITUTION:When a high order device 101 transmits testing data to a common bus 103, an input and output control device 102 receives these testing data by the DMA transferring and the data are turned back to the common bus 103 by a turning back means 104. In the high order device 101, coincidence between the data, which are received from the common bus 103, and transmitting data is detected by a coincidence detecting means 105 and when the coincidence is detected, it is judged that the common bus 103 to reach the input and output control device is normal. By executing such a test in each input and output control device, the retrieval of a trouble spot in the common bus 103 can be executed.
JP62234094A 1987-09-18 1987-09-18 System for testing common bus Pending JPS6476246A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62234094A JPS6476246A (en) 1987-09-18 1987-09-18 System for testing common bus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62234094A JPS6476246A (en) 1987-09-18 1987-09-18 System for testing common bus

Publications (1)

Publication Number Publication Date
JPS6476246A true JPS6476246A (en) 1989-03-22

Family

ID=16965524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62234094A Pending JPS6476246A (en) 1987-09-18 1987-09-18 System for testing common bus

Country Status (1)

Country Link
JP (1) JPS6476246A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5345945A (en) * 1976-10-07 1978-04-25 Toyoda Machine Works Ltd Data transfer device
JPS5587215A (en) * 1978-12-26 1980-07-01 Fujitsu Ltd Control data confirmation system of data processor
JPS58149529A (en) * 1982-03-02 1983-09-05 Hitachi Ltd Turning-back and diagnosing system of channel status word

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5345945A (en) * 1976-10-07 1978-04-25 Toyoda Machine Works Ltd Data transfer device
JPS5587215A (en) * 1978-12-26 1980-07-01 Fujitsu Ltd Control data confirmation system of data processor
JPS58149529A (en) * 1982-03-02 1983-09-05 Hitachi Ltd Turning-back and diagnosing system of channel status word

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