JPS58149529A - Turning-back and diagnosing system of channel status word - Google Patents

Turning-back and diagnosing system of channel status word

Info

Publication number
JPS58149529A
JPS58149529A JP57031815A JP3181582A JPS58149529A JP S58149529 A JPS58149529 A JP S58149529A JP 57031815 A JP57031815 A JP 57031815A JP 3181582 A JP3181582 A JP 3181582A JP S58149529 A JPS58149529 A JP S58149529A
Authority
JP
Japan
Prior art keywords
channel status
status word
test data
data
control unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57031815A
Other languages
Japanese (ja)
Other versions
JPS6156818B2 (en
Inventor
Masahiko Tanaka
雅彦 田中
Yoshio Imai
今井 喜生
Masao Kataoka
片岡 誠夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57031815A priority Critical patent/JPS58149529A/en
Publication of JPS58149529A publication Critical patent/JPS58149529A/en
Publication of JPS6156818B2 publication Critical patent/JPS6156818B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Input From Keyboards Or The Like (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Computer And Data Communications (AREA)

Abstract

PURPOSE:To improve the diagnostic function and the efficiency of the locating work or the like, by demarcating automatically faults in paths and parts when faults concerning channel status words are searched. CONSTITUTION:A channel status word CSW turning-back control data signal transmitted from a central controller 1 to a common bus 4 is taken into a peripheral controller 3 and is recognized and is stored in a storage area B for CSW original data of a buffer memory 3e. Simultaneously, this signal is transferred and written onto a specific area A for storage of CSW of a main storage device 2 and is stored in a storage area C for CSW read data of the buffer memory 3e, and write data in the area B and read data in the area C are compared and discriminated autonomously, and the result is reported to the central controller 1 through a status controlling part 3a.

Description

【発明の詳細な説明】 本発明は、通信制御装置等において、そのチャネルステ
ータスワード(以下、C8Wという。)に係る障害探索
の際の障害経路9部位の切分けを行うだめのチャネルス
テータスワード折返し診断方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for returning a channel status word to isolate nine parts of a faulty route when searching for a fault related to the channel status word (hereinafter referred to as C8W) in a communication control device or the like. This relates to diagnostic methods.

通信制御装置等における従来のC8W折返し診断方式は
、−例として、中央制御装置からC8W折返し診断のだ
めの所〆の試験データが含まれているC8W折返し制御
データ信号を共通バスへ送出し、これを周辺制御装置の
ステータス制御部が受信して、その試験データを一旦バ
ッファメモリ内のC8Wデータ・浴稍エリアに格納した
後、主記憶装置のC8Wデータ格納特定エリアへ転送・
格納をし、中央制御装置が主記憶装置から当該試験デー
タを読み取り、その照合9判定をするというものであつ
、/”−。
The conventional C8W loopback diagnosis method in a communication control device, etc., for example, sends a C8W loopback control data signal containing test data at the end of the C8W loopback diagnosis from the central controller to a common bus, and sends this signal to the common bus. The status control unit of the peripheral control device receives the test data, temporarily stores it in the C8W data storage area in the buffer memory, and then transfers it to the C8W data storage specific area in the main memory.
The test data is stored, the central control unit reads the test data from the main memory, and performs a comparison and judgment.

この場合、周辺制御装置は、上記試験データをバッファ
メモリに残しておかず、また、その主記憶装置への書込
み結果の確認を行っていないので、C8W@告で障害が
発生したときは、中央制御装置は周辺制御装置が中央制
御装置から上記C8W折返し制御データ信号を受信する
丑での経路の障害か、または周辺制御装置から主記憶装
置へ同上信号に含捷れ試験データを書き込むだめの経路
の障害かを識別することができなかった。
In this case, the peripheral control device does not leave the above test data in the buffer memory and does not check the result of writing to the main memory, so when a failure occurs in the C8W@ notification, the central control The device may be damaged due to a failure in the path where the peripheral control device receives the C8W return control data signal from the central control device, or a failure in the path from the peripheral control device to the main storage device to write the test data contained in the same signal. It was not possible to identify the problem.

したがって、障害経路2部位の切分けは、多くの人手を
安し、煩雑で効率が悪く、不確実な方法をとらざるを得
なかった。
Therefore, in order to separate the two parts of the faulty route, a method that requires a lot of manpower, is complicated, inefficient, and uncertain has to be used.

本発明の目的は、上記しだ従来技術の欠点をなくり、、
C3WK保る障害探索の際の障害経路2部位の切分けを
自動化することができるチャネルステータスワード折返
し診断方式を提供することにある。
The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art,
An object of the present invention is to provide a channel status word return diagnosis method that can automate the separation of two parts of a fault route when searching for a fault in C3WK.

本発明の特徴は、中央制御装置からチャネルステータス
ワード折返し診断のための所定の試験データが含捷れて
いるチャネルステータスワード折返し制御データ信号を
送出し、これを周辺制御装置が受信して当該試験データ
を主記憶装置のチャネルステータスワード格納特定エリ
アへ転送・書込みをし、その内容を上記中央処理装置が
照合・判定をするチャネルステータスワード折返し診断
方式において、周辺制御装置が、チャネルステータスワ
ード折返し診断のための原試験データと、これを主記憶
装置に書き込んだものを更に読み取った読取り試験デー
タとを自律的に比較・判定した結果を中央制御装置へ¥
に告し、前記中央処理装置が、その報告の有無・内容、
もしくは上記主記憶装置への上記試験データの書込みの
有無・内容、またはこれらの組合せに基づき、障害経路
・部位の識別を行うようにしたチャネルステータスワー
ド折返し診断方式にある。
A feature of the present invention is that a central control device sends out a channel status word return control data signal containing predetermined test data for channel status word return diagnosis, and a peripheral control device receives this signal to perform the relevant test. In the channel status word loopback diagnosis method in which data is transferred and written to a specific channel status word storage area of the main memory, and the contents are collated and judged by the central processing unit, the peripheral control device performs channel status word loopback diagnosis. It autonomously compares and judges the original test data and the read test data written to the main memory and further read, and sends the results to the central control unit.
The central processing unit will check the presence/absence and content of the report,
Alternatively, there is a channel status word return diagnosis method in which a fault path/part is identified based on the presence/absence and content of the test data written to the main storage device, or a combination thereof.

以下、本発明の実施例を図に基づいて説明する。Embodiments of the present invention will be described below based on the drawings.

図は、本発明に係るチャネルステータスワード折返し診
断方式による通信制m+装置の一実施例の方式何成図で
ある。
The figure is a system diagram of an embodiment of a communication system m+ device using a channel status word return diagnosis system according to the present invention.

ここで、1は、中央制御装置(CP U )、2は、主
記憶装置(MM)であって、通常の格納工IJアのほか
にC8Wデータ格納特定エリアAを設けたもの、3は、
周辺制御装置(IOC)、3aは、そのステータス制御
部(8CJ、)、3bは、同バス、3Cは、同び算処理
部(A L U )、3dは、同読取り専用メモ’J(
ROM)であって、上記演算処理部3Cその他の制御プ
ログラムが格納されているもの、3eは、同バッファメ
モリ(BFM)であって、′内えば、ランダムアクセス
メモリ(I%AM)で構成され、通常の′@網エリアの
ほかにC8W原データ格納エリアB、C8W読取りデー
タ格納エリアCを設けたもの、4は、上記各装置1,2
.3間を接続する共通バス(B’(JS)である。
Here, 1 is a central control unit (CPU), 2 is a main memory (MM), which has a C8W data storage specific area A in addition to the normal storage IJA, and 3:
Peripheral control unit (IOC), 3a is its status control unit (8CJ), 3b is the same bus, 3C is the same arithmetic processing unit (ALU), 3d is the same read-only memo 'J (
ROM) in which the arithmetic processing unit 3C and other control programs are stored; 3e is a buffer memory (BFM); , which has a C8W original data storage area B and a C8W read data storage area C in addition to the normal '@ network area, 4 is for each of the above devices 1 and 2.
.. A common bus (B' (JS)) connects the three.

なお、本通信制御装置が回線を通して他の同装置との闇
で通信を行うため、モデムが入出力ボート(チャネル)
として周辺制御装置3に接続されるが、本実施例の説明
に直接の関係がないので図示省略をしである。
In addition, since this communication control device communicates with other same devices through the line, the modem is connected to the input/output port (channel).
Although it is connected to the peripheral control device 3 as a controller, it is not shown because it has no direct relation to the explanation of this embodiment.

ステータスワードの診断の動作について以下で説明する
The operation of status word diagnosis will be explained below.

まず、中央制御装置1は、C8W折返し診断のだめの所
定の試験データ(通常のC8Wデ〜りと同一フォーマッ
トであって、試験用である旨を示す特足パターンのもの
)が含1れているC8W折返し制御データ信号を共通バ
ス4へ送出し、主記憶装置2のC8Wデータ格納特定エ
リアに全゛0′″を書き込む。これは、後に当該試験デ
ータが周辺制御装置3から簀き込まれるためである。
First, the central control device 1 contains predetermined test data for C8W return diagnosis (which has the same format as normal C8W data and has a special pattern indicating that it is for testing). Sends the C8W return control data signal to the common bus 4 and writes all "0'" to the C8W data storage specific area of the main memory device 2. This is because the test data will be stored from the peripheral control device 3 later. It is.

次に、周辺制御装置3は、ステータス制御部3aにより
、共通バス4から上記C8W折返し制御データ信号を演
算処理部3cへ取り込む。
Next, the peripheral control device 3 takes in the C8W return control data signal from the common bus 4 to the arithmetic processing section 3c using the status control section 3a.

演算処理部3cは、この信号の認識を行った後、その試
験データをバッファメモIJ 3 eのC8W原データ
格納エリアBに格納するとともに(以上、経路5a)、
主記憶装置2のC8W格納特定エリアAに転送・書込み
をしく経路5b)、更に、その試験データを主記憶装置
2の上記エリアAから読み取ってバッファメモIJ 3
 eのC8W読取リデータ格納工+)アCに格納した後
(経路5d)、書込みデータ(上記エリアB)、読取り
データ(上記エリアC)の比較・判定を自律的に行い、
その結果をステータス制御部3aを介して中央制御装置
1へ報告する。
After recognizing this signal, the arithmetic processing unit 3c stores the test data in the C8W original data storage area B of the buffer memory IJ3e (route 5a),
The test data is transferred and written to the C8W storage specific area A of the main memory device 2 (route 5b), and the test data is read from the area A of the main memory device 2 to the buffer memo IJ3.
After storing the C8W read data storage area +) aC of e (path 5d), it autonomously compares and determines the written data (area B above) and the read data (area C above),
The results are reported to the central control device 1 via the status control section 3a.

中央制御装置1ば、次のようにしてC8W折返し診断を
行う。
The central control unit 1 performs C8W return diagnosis as follows.

(1)上記C8W折返し制御データ信号に対する周辺制
御装置3からの応答(−4告)が々い場合と、主記憶装
置2のC8Wテ−タ格納特足エリアAに当該試験データ
が書き適寸れていない場合とについては、中央制御装置
12周辺制御装置3間の経路5aの異常、I洋書と判定
する。
(1) If there are too many responses (-4 notifications) from the peripheral control device 3 to the above C8W return control data signal, and the test data is written in the C8W data special storage area A of the main storage device 2 to an appropriate size. If not, it is determined that there is an abnormality in the path 5a between the central control device 12 and the peripheral control device 3, and that it is a foreign book.

(2)主記憶装置2のC8Wデータ格納特定エリアAに
試験データが書き込寸れているにもかかわらず、上記C
8W折返し制御データ1g号に対する周辺制御装置3か
らの応答(報告)がない場合については、周辺制御装置
3の応答機能の異常、障害と判定する。
(2) Even though the test data has not been written to the C8W data storage specific area A of the main memory device 2, the above C
If there is no response (report) from the peripheral control device 3 to the 8W return control data No. 1g, it is determined that there is an abnormality or failure in the response function of the peripheral control device 3.

(3)C8W折返し制御データ信号に対する周辺制御装
置3からの応答(¥8告)が異常である旨のものである
場合と、主記憶装置2のC8Wデータ格納特定エリアA
に試験データが書き込寸れていない場合とについては、
周辺制御装置3゜主記憶装置2間の経路5bの異常、障
害と判定する。
(3) When the response (¥8 notification) from the peripheral control device 3 to the C8W return control data signal is abnormal, and when the C8W data storage specific area A of the main storage device 2
If the test data is not written correctly,
It is determined that there is an abnormality or failure in the path 5b between the peripheral control device 3 and the main storage device 2.

(4)主記憶装置m2のC8Wデータ格納特定エリアA
に試験データが書き適寸れているにもかかわらず、C8
W折返し制御データ信号に対する周辺制御装置3からの
応答(−4,告)が異常である旨のものである場合につ
いては、中央制御装置1、主記憶装置2間の経路5Cの
異常、障害と判定する。
(4) C8W data storage specific area A of main storage device m2
Even though the test data is written on the C8
If the response (-4, notification) from the peripheral control device 3 to the W loopback control data signal indicates an abnormality, it is assumed that the path 5C between the central control device 1 and the main storage device 2 is abnormal or faulty. judge.

以上により、中央制御装置1.主記憶装置2゜周辺制御
装置3の各相互間の各経路5a、5J5Cの異常、障害
と、周辺制御装置3自身の異常。
As described above, the central control device 1. Abnormalities and failures in the paths 5a and 5J5C between the main storage device 2 and the peripheral control device 3, and abnormalities in the peripheral control device 3 itself.

障害とについて、自動的に識別が可能となり、C8W折
返し診断による障害解析作業を容易とすることができる
Faults can be automatically identified, and fault analysis work by C8W return diagnosis can be facilitated.

以上、詳ホロ1に説明したように、本発明によれば、通
信制御装置等において、その周辺制御装置から主記憶装
置に対するC8Wの書込み、読取りの診断、識別が中央
制御装置によって自動的に行うことができるので、その
診断機能の向上と、C8W報告経路の障害部位の切分は
作業等の効率向上とに顕著な効果が得られる。
As described above in detail 1, according to the present invention, in a communication control device, etc., the central control device automatically performs diagnosis and identification of writing and reading of C8W from the peripheral control device to the main memory device. As a result, it is possible to improve the diagnostic function and isolate the faulty part of the C8W reporting route, which has a remarkable effect on improving the efficiency of work.

【図面の簡単な説明】[Brief explanation of the drawing]

図は、本発明に係るチャネルステータスワード折返し診
断方式による通信制@j装置の一実施例の方式構成図で
ある。 1・・・中央制御装置、2・・主記憶装置、3・・・周
辺制御装置、2a・・・ステータス制御部、2b・・・
バス、3C・・・演算処理部、3d・・・読出し専用メ
モリ、3e・・・バッファメモリ、4・・・共通バス。 代理人 弁理士 福田幸作 (/よか1名)
FIG. 1 is a system configuration diagram of an embodiment of a communication system @j device using a channel status word return diagnosis system according to the present invention. DESCRIPTION OF SYMBOLS 1...Central control unit, 2...Main storage device, 3...Peripheral control device, 2a...Status control unit, 2b...
Bus, 3C... Arithmetic processing unit, 3d... Read-only memory, 3e... Buffer memory, 4... Common bus. Agent: Patent attorney Kosaku Fukuda (/Yoka 1 person)

Claims (1)

【特許請求の範囲】[Claims] 1、中央制御装置からチャネルステータスワード折返し
診断のだめの所定の試験データが含まれているチャネル
ステータスワード折返し制御データ信号を送出し、これ
を周辺制御装置が受信して当該試験データを主記憶装置
のチャネルステータスワード格納特定エリアへ転送・簀
込みをし、その内容を上記中央制御装置が照合・判定を
するチャネルステータスワード折返し診断方式において
、周辺制御装置が、チャネルステータスワード折返し診
断のだめの原試験データと、これを主記憶装置に簀き込
んだものを更に読み取った読取り試験データとを自律的
に比較・判定した結果を中央制御装置へ報告し、前記中
央処理装置が、その報告の有無・内容、もしくは上記主
記憶装置への上記試験データの書込みの有無・内容、ま
たはこれらの組合せに基づき、障害経路・部位の識別を
行うようにすることを特徴とするチャネルステータスワ
ード折返し診断方式。
1. The central control unit sends a channel status word return control data signal containing predetermined test data for channel status word return diagnosis, and the peripheral control unit receives this and stores the test data in the main memory. In the channel status word return diagnosis method, in which the channel status word is transferred and stored in a specific storage area, and its contents are collated and judged by the central control unit, the peripheral control unit collects the original test data for the channel status word return diagnosis. The results are autonomously compared and judged with the reading test data stored in the main memory and further read, and the results are reported to the central control unit, and the central processing unit determines whether or not there is a report and its content A channel status word return diagnosis method characterized in that a failure route/part is identified based on the presence/absence/content of writing of the test data to the main storage device, or a combination thereof.
JP57031815A 1982-03-02 1982-03-02 Turning-back and diagnosing system of channel status word Granted JPS58149529A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57031815A JPS58149529A (en) 1982-03-02 1982-03-02 Turning-back and diagnosing system of channel status word

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57031815A JPS58149529A (en) 1982-03-02 1982-03-02 Turning-back and diagnosing system of channel status word

Publications (2)

Publication Number Publication Date
JPS58149529A true JPS58149529A (en) 1983-09-05
JPS6156818B2 JPS6156818B2 (en) 1986-12-04

Family

ID=12341583

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57031815A Granted JPS58149529A (en) 1982-03-02 1982-03-02 Turning-back and diagnosing system of channel status word

Country Status (1)

Country Link
JP (1) JPS58149529A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6476246A (en) * 1987-09-18 1989-03-22 Fujitsu Ltd System for testing common bus
JPH04340149A (en) * 1991-02-27 1992-11-26 Pfu Ltd Failure diagnostic system
JPH0695981A (en) * 1990-04-12 1994-04-08 Sun Microsyst Inc Workstation having central processing unit cpu and system bus, i.e. server

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6476246A (en) * 1987-09-18 1989-03-22 Fujitsu Ltd System for testing common bus
JPH0695981A (en) * 1990-04-12 1994-04-08 Sun Microsyst Inc Workstation having central processing unit cpu and system bus, i.e. server
JPH04340149A (en) * 1991-02-27 1992-11-26 Pfu Ltd Failure diagnostic system

Also Published As

Publication number Publication date
JPS6156818B2 (en) 1986-12-04

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