JPS5451347A - Fault detection system of data processor - Google Patents
Fault detection system of data processorInfo
- Publication number
- JPS5451347A JPS5451347A JP11759977A JP11759977A JPS5451347A JP S5451347 A JPS5451347 A JP S5451347A JP 11759977 A JP11759977 A JP 11759977A JP 11759977 A JP11759977 A JP 11759977A JP S5451347 A JPS5451347 A JP S5451347A
- Authority
- JP
- Japan
- Prior art keywords
- error
- bus
- data
- input
- central processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Detection And Correction Of Errors (AREA)
Abstract
PURPOSE:To detect the fault of hardware by detecting the error of data during the data transfer by adding a check bus, error bus and acknowledge bus. CONSTITUTION:On the basis of external input data, error detection information is generated in the input interface part and then transmitted to the check bus. In the output interface part, this check bus information is collated with the data outputted from the central processor, and when an error is detected, an error signal is outputted to the error bus. The main memory part and input-output interface part, on the other hand, output a signal, which answers to the input-output access from the central processor, to the acknowledge bus. Then, the central processor detects the error of input data and generates error detection information to the output data; and then, when either this input data error information or error information from the error bus is received, or when no answer is received from the acknowledge bus line, and error interruption is caused to the central processor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11759977A JPS5451347A (en) | 1977-09-29 | 1977-09-29 | Fault detection system of data processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11759977A JPS5451347A (en) | 1977-09-29 | 1977-09-29 | Fault detection system of data processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5451347A true JPS5451347A (en) | 1979-04-23 |
Family
ID=14715781
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11759977A Pending JPS5451347A (en) | 1977-09-29 | 1977-09-29 | Fault detection system of data processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5451347A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100262692B1 (en) * | 1997-12-23 | 2000-08-01 | 서평원 | Method for control of device in a process |
-
1977
- 1977-09-29 JP JP11759977A patent/JPS5451347A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100262692B1 (en) * | 1997-12-23 | 2000-08-01 | 서평원 | Method for control of device in a process |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |