JPS56140735A - Error detecting system - Google Patents
Error detecting systemInfo
- Publication number
- JPS56140735A JPS56140735A JP4203480A JP4203480A JPS56140735A JP S56140735 A JPS56140735 A JP S56140735A JP 4203480 A JP4203480 A JP 4203480A JP 4203480 A JP4203480 A JP 4203480A JP S56140735 A JPS56140735 A JP S56140735A
- Authority
- JP
- Japan
- Prior art keywords
- information
- transferred
- memory
- register
- uncoincidence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Communication Control (AREA)
Abstract
PURPOSE:To enable to detect erroneous data hardly detectable by detecting the coincidence or uncoincidence of the information between a memory and a data register for all routes of information transferred to or from the information processors connected by a communication circuit. CONSTITUTION:The data register 108 stores the information sent from or to be transferred to the processor 101. In addition, an internal memory 110 is provided. The information on the register 108 transferred from the processor 101 is transferred to the memory 110 to produce the inspection code. Then the information stored in the memory 110 is inspected by the inspection code and detected for the coincidence or uncoincidence with the information of the register 108 and the memory 110. In this way, the error of information can be detected for all routes of information transferred to or from the information processors connected by a communication circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4203480A JPS56140735A (en) | 1980-04-02 | 1980-04-02 | Error detecting system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4203480A JPS56140735A (en) | 1980-04-02 | 1980-04-02 | Error detecting system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56140735A true JPS56140735A (en) | 1981-11-04 |
Family
ID=12624870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4203480A Pending JPS56140735A (en) | 1980-04-02 | 1980-04-02 | Error detecting system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56140735A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58111451A (en) * | 1981-12-24 | 1983-07-02 | Fuji Electric Co Ltd | Data transmission system |
-
1980
- 1980-04-02 JP JP4203480A patent/JPS56140735A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58111451A (en) * | 1981-12-24 | 1983-07-02 | Fuji Electric Co Ltd | Data transmission system |
JPH0255979B2 (en) * | 1981-12-24 | 1990-11-28 | Fuji Denki Kk |
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