JPS56140735A - Error detecting system - Google Patents

Error detecting system

Info

Publication number
JPS56140735A
JPS56140735A JP4203480A JP4203480A JPS56140735A JP S56140735 A JPS56140735 A JP S56140735A JP 4203480 A JP4203480 A JP 4203480A JP 4203480 A JP4203480 A JP 4203480A JP S56140735 A JPS56140735 A JP S56140735A
Authority
JP
Japan
Prior art keywords
information
transferred
memory
register
uncoincidence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4203480A
Other languages
Japanese (ja)
Inventor
Takao Oe
Yoshinori Tsujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4203480A priority Critical patent/JPS56140735A/en
Publication of JPS56140735A publication Critical patent/JPS56140735A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To enable to detect erroneous data hardly detectable by detecting the coincidence or uncoincidence of the information between a memory and a data register for all routes of information transferred to or from the information processors connected by a communication circuit. CONSTITUTION:The data register 108 stores the information sent from or to be transferred to the processor 101. In addition, an internal memory 110 is provided. The information on the register 108 transferred from the processor 101 is transferred to the memory 110 to produce the inspection code. Then the information stored in the memory 110 is inspected by the inspection code and detected for the coincidence or uncoincidence with the information of the register 108 and the memory 110. In this way, the error of information can be detected for all routes of information transferred to or from the information processors connected by a communication circuit.
JP4203480A 1980-04-02 1980-04-02 Error detecting system Pending JPS56140735A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4203480A JPS56140735A (en) 1980-04-02 1980-04-02 Error detecting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4203480A JPS56140735A (en) 1980-04-02 1980-04-02 Error detecting system

Publications (1)

Publication Number Publication Date
JPS56140735A true JPS56140735A (en) 1981-11-04

Family

ID=12624870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4203480A Pending JPS56140735A (en) 1980-04-02 1980-04-02 Error detecting system

Country Status (1)

Country Link
JP (1) JPS56140735A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111451A (en) * 1981-12-24 1983-07-02 Fuji Electric Co Ltd Data transmission system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111451A (en) * 1981-12-24 1983-07-02 Fuji Electric Co Ltd Data transmission system
JPH0255979B2 (en) * 1981-12-24 1990-11-28 Fuji Denki Kk

Similar Documents

Publication Publication Date Title
FR2574963B1 (en) IDENTIFICATION DEVICE
JPS5539994A (en) Multiprocessor system
JPS56140735A (en) Error detecting system
JPS6419387A (en) Bit map processor
JPS5710859A (en) Interprocessor communication system
JPS56136056A (en) Error inspection system
JPS5764399A (en) Data processing device
JPS5617543A (en) Axial ratio compensating circuit
JPS538534A (en) Checking system for coincidence detection circuit
JPS5794862A (en) Display system of data error
JPS56140754A (en) Processor
JPS5617442A (en) Parity error processing system
JPS5593596A (en) Memory unit
JPS57164341A (en) Program controller
JPS5622122A (en) Data processing system
JPS57209547A (en) Collecting device for program executing carrier information
JPS57143654A (en) Memory sequence extending circuit
JPS5588147A (en) Abnormality detection system of multiprocessor system
JPS53132224A (en) Identifying system for detection error in page detection
JPS57132253A (en) Error processing method of information processor
JPS5781650A (en) Data processor
JPS57137972A (en) Character out position detecting method
JPS53135536A (en) Test method for data processor
JPS5578349A (en) Error detection system
JPS53123038A (en) Data detection system