JPS6467976A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6467976A
JPS6467976A JP22504787A JP22504787A JPS6467976A JP S6467976 A JPS6467976 A JP S6467976A JP 22504787 A JP22504787 A JP 22504787A JP 22504787 A JP22504787 A JP 22504787A JP S6467976 A JPS6467976 A JP S6467976A
Authority
JP
Japan
Prior art keywords
substrate
grooves
openings
groove
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22504787A
Other languages
Japanese (ja)
Inventor
Yoshimi Tsuchiya
Hirotsugu Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP22504787A priority Critical patent/JPS6467976A/en
Publication of JPS6467976A publication Critical patent/JPS6467976A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To accurately and easily form a semiconductor substrate in a desired thickness by forming a groove of depth corresponding to a predetermined thickness to be formed on a first main surface of the substrate, and reducing the thickness of the substrate until it coincides with the depth of the groove from a second main surface side. CONSTITUTION:A silicon substrate 1 formed with openings 6a, 6b, 6c in an oxide film 2 is dipped in potassium hydroxide solution and anisotropically etched. Then, grooves 8a, 8b, 8a of V-shaped section in which the depths are deepened in the order of the opening widths, i.e, the openings 6a, 6b, 6c. On the other hand, grooves 9a, 9b are enlarged by etching the substrate 1 from openings 7a, 7b formed on its rear face, and the bottom of the groove 9b arrives at grooves 8c, 8b, 8a in this order. Here, the presence or absence of penetration with the grooves 8c, 8b, 9b is confirmed by employing means for irradiating the main surface of the substrate 1 with a light to photodetect it from its opposite side.
JP22504787A 1987-09-08 1987-09-08 Manufacture of semiconductor device Pending JPS6467976A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22504787A JPS6467976A (en) 1987-09-08 1987-09-08 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22504787A JPS6467976A (en) 1987-09-08 1987-09-08 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6467976A true JPS6467976A (en) 1989-03-14

Family

ID=16823207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22504787A Pending JPS6467976A (en) 1987-09-08 1987-09-08 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6467976A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0491434A (en) * 1990-08-02 1992-03-24 Nippondenso Co Ltd Method and apparatus for etching
US7772098B2 (en) 2007-03-29 2010-08-10 Panasonic Corporation Method for manufacturing semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0491434A (en) * 1990-08-02 1992-03-24 Nippondenso Co Ltd Method and apparatus for etching
US7772098B2 (en) 2007-03-29 2010-08-10 Panasonic Corporation Method for manufacturing semiconductor device

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