JPS6458045A - Data transfer system - Google Patents

Data transfer system

Info

Publication number
JPS6458045A
JPS6458045A JP62214502A JP21450287A JPS6458045A JP S6458045 A JPS6458045 A JP S6458045A JP 62214502 A JP62214502 A JP 62214502A JP 21450287 A JP21450287 A JP 21450287A JP S6458045 A JPS6458045 A JP S6458045A
Authority
JP
Japan
Prior art keywords
processor
block
data
transfer
busy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62214502A
Other languages
Japanese (ja)
Other versions
JPH0564824B2 (en
Inventor
Shunichiro Nakamura
Harumi Minemura
Tatsuo Minohara
Tomohito Saitou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62214502A priority Critical patent/JPS6458045A/en
Publication of JPS6458045A publication Critical patent/JPS6458045A/en
Publication of JPH0564824B2 publication Critical patent/JPH0564824B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To facilitate the transfer of data between processor, by securing such a constitution that can utilize at the maximum a common memory area prepared for transfer of data. CONSTITUTION:When data are transferred to a master processor 5 from a slave processor 1, the processor 1 gives a block writing request to a program of the processor 5. Thus a block is selected out of a data transfer area (cache area 17) of a common memory 7. When the selected block is busy, the contents of this block are written into an external memory medium (disk device 6). Then the processor 1 confirms the position of said busy block and writes the transmission data into this block. When said block is filled with data and more transmission data are written, the processor 1 gives a block writing request again to the program of the processor 5.
JP62214502A 1987-08-28 1987-08-28 Data transfer system Granted JPS6458045A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62214502A JPS6458045A (en) 1987-08-28 1987-08-28 Data transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62214502A JPS6458045A (en) 1987-08-28 1987-08-28 Data transfer system

Publications (2)

Publication Number Publication Date
JPS6458045A true JPS6458045A (en) 1989-03-06
JPH0564824B2 JPH0564824B2 (en) 1993-09-16

Family

ID=16656775

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62214502A Granted JPS6458045A (en) 1987-08-28 1987-08-28 Data transfer system

Country Status (1)

Country Link
JP (1) JPS6458045A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007299386A (en) * 2006-04-28 2007-11-15 Hewlett-Packard Development Co Lp System for controlling i/o devices in multi-partition computer system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59220853A (en) * 1983-05-27 1984-12-12 Toshiba Corp Disc cache system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59220853A (en) * 1983-05-27 1984-12-12 Toshiba Corp Disc cache system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007299386A (en) * 2006-04-28 2007-11-15 Hewlett-Packard Development Co Lp System for controlling i/o devices in multi-partition computer system
US8677034B2 (en) 2006-04-28 2014-03-18 Hewlett-Packard Development Company, L.P. System for controlling I/O devices in a multi-partition computer system

Also Published As

Publication number Publication date
JPH0564824B2 (en) 1993-09-16

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