JPS56157518A - Communication device between processing devices - Google Patents

Communication device between processing devices

Info

Publication number
JPS56157518A
JPS56157518A JP6034680A JP6034680A JPS56157518A JP S56157518 A JPS56157518 A JP S56157518A JP 6034680 A JP6034680 A JP 6034680A JP 6034680 A JP6034680 A JP 6034680A JP S56157518 A JPS56157518 A JP S56157518A
Authority
JP
Japan
Prior art keywords
register
data
busy
party
processing devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6034680A
Other languages
Japanese (ja)
Inventor
Toru Akai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6034680A priority Critical patent/JPS56157518A/en
Publication of JPS56157518A publication Critical patent/JPS56157518A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To transfer a great volume of data between processing devices efficiently, by controlling the use state of a register in the memory access control device and by inhibiting the data write to this register when this register is busy. CONSTITUTION:Data to be transferred is stored temporarily from processing devices 11-1n into a register 5 in a memory access control device 2, and the communication request is issued to the other-party processing device. The other-party processing device reads out data in the register 5 by the same bus as the access to a memory device 3 to complete data transfer. When the other-party device sets data in the register 5, it is discriminated whether the register 5 is busy or not, and the result is returned to the request source; and if the register 5 is not busy, the busy state is indicated, and data is sent in the register 5, and the communication request is issued to the communication destination device. When the other-party device reads out contents of the register 5, the busy state of the register 5 is relased.
JP6034680A 1980-05-06 1980-05-06 Communication device between processing devices Pending JPS56157518A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6034680A JPS56157518A (en) 1980-05-06 1980-05-06 Communication device between processing devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6034680A JPS56157518A (en) 1980-05-06 1980-05-06 Communication device between processing devices

Publications (1)

Publication Number Publication Date
JPS56157518A true JPS56157518A (en) 1981-12-04

Family

ID=13139505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6034680A Pending JPS56157518A (en) 1980-05-06 1980-05-06 Communication device between processing devices

Country Status (1)

Country Link
JP (1) JPS56157518A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6143370A (en) * 1984-08-03 1986-03-01 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Multiplex processing system
JPS61195450A (en) * 1985-02-25 1986-08-29 Fujitsu Ltd Interfacing method for common register

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6143370A (en) * 1984-08-03 1986-03-01 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Multiplex processing system
JPH0452982B2 (en) * 1984-08-03 1992-08-25 Intaanashonaru Bijinesu Mashiinzu Corp
JPS61195450A (en) * 1985-02-25 1986-08-29 Fujitsu Ltd Interfacing method for common register

Similar Documents

Publication Publication Date Title
JPS5717049A (en) Direct memory access controlling circuit and data processing system
JPS56157518A (en) Communication device between processing devices
JPS5730170A (en) Buffer memory control system
JPS6437640A (en) Control system for cache memory
JPS6453648A (en) Communication processing method and device therefor
JPS558605A (en) Data processing system
JPS5533214A (en) Information processing system
JPS6478361A (en) Data processing system
JPS5674738A (en) Transfer system of display data
JPS56143583A (en) Buffer memory control system
JPS5750378A (en) Control system of data processor
JPS55154623A (en) Input and output control system
JPS56100586A (en) Ipl system in decentralized processing electronic exchanger
JPS56129473A (en) Facsimile device with memory device
JPS5733472A (en) Memory access control system
JPS5622157A (en) Process system multiplexing system
JPS57205885A (en) Channel buffer controlling system
JPS57150017A (en) Direct memory access system
JPS6473458A (en) System for controlling access of vector data
JPS5759222A (en) Dma data transfer system
JPS57187754A (en) Magnetic disc processing device
JPS57139833A (en) Interruption controlling circuit
JPS57114926A (en) Terminal control system
JPS56135260A (en) Inter-processor information transfer system
JPS57209520A (en) Loading system for memory