JPS57205885A - Channel buffer controlling system - Google Patents

Channel buffer controlling system

Info

Publication number
JPS57205885A
JPS57205885A JP56091698A JP9169881A JPS57205885A JP S57205885 A JPS57205885 A JP S57205885A JP 56091698 A JP56091698 A JP 56091698A JP 9169881 A JP9169881 A JP 9169881A JP S57205885 A JPS57205885 A JP S57205885A
Authority
JP
Japan
Prior art keywords
access
channel
assigned
access port
channel buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56091698A
Other languages
Japanese (ja)
Other versions
JPS6055859B2 (en
Inventor
Takashi Chiba
Satoshi Koga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56091698A priority Critical patent/JPS6055859B2/en
Priority to CA000404364A priority patent/CA1187198A/en
Priority to DE8282302979T priority patent/DE3278336D1/en
Priority to EP82302979A priority patent/EP0067657B1/en
Priority to AU84782/82A priority patent/AU535717B2/en
Priority to ES513068A priority patent/ES513068A0/en
Priority to BR8203488A priority patent/BR8203488A/en
Priority to US06/388,195 priority patent/US4453216A/en
Priority to KR8202655A priority patent/KR880000361B1/en
Publication of JPS57205885A publication Critical patent/JPS57205885A/en
Publication of JPS6055859B2 publication Critical patent/JPS6055859B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To always exhibit the effect of a channel buffer at its maximum and to prevent the overrun of channel, by changing the control of the channel buffer in accordance with the classification of data. CONSTITUTION:An access controlling section of a main memory is composed of an access port 35-0 assigned to a central processor 6-0, another access port 35-1 assigned to another central processor 6-1, and an access port 36 and a priority circuit 37 assigned to a channel processor, etc. The access port 36 assigned to the channel processor is composed of a main memory access request register and a CHP store data register. The priority circuit 37 selects one piece of access request in accordance with the priority of each access request when several access requests are made at the same time.
JP56091698A 1981-06-15 1981-06-15 Channel buffer control method Expired JPS6055859B2 (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP56091698A JPS6055859B2 (en) 1981-06-15 1981-06-15 Channel buffer control method
CA000404364A CA1187198A (en) 1981-06-15 1982-06-03 System for controlling access to channel buffers
DE8282302979T DE3278336D1 (en) 1981-06-15 1982-06-09 Computer system
EP82302979A EP0067657B1 (en) 1981-06-15 1982-06-09 Computer system
AU84782/82A AU535717B2 (en) 1981-06-15 1982-06-10 Computer system
ES513068A ES513068A0 (en) 1981-06-15 1982-06-14 "A COMPUTER INSTALLATION".
BR8203488A BR8203488A (en) 1981-06-15 1982-06-14 COMPUTER SYSTEM
US06/388,195 US4453216A (en) 1981-06-15 1982-06-14 Access control system for a channel buffer
KR8202655A KR880000361B1 (en) 1981-06-15 1982-06-15 Computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56091698A JPS6055859B2 (en) 1981-06-15 1981-06-15 Channel buffer control method

Publications (2)

Publication Number Publication Date
JPS57205885A true JPS57205885A (en) 1982-12-17
JPS6055859B2 JPS6055859B2 (en) 1985-12-06

Family

ID=14033732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56091698A Expired JPS6055859B2 (en) 1981-06-15 1981-06-15 Channel buffer control method

Country Status (1)

Country Link
JP (1) JPS6055859B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153554A (en) * 1984-01-23 1985-08-13 Hitachi Ltd Input/output control circuit
JPS60246457A (en) * 1984-05-21 1985-12-06 Fujitsu Ltd Memory access controlling circuit
JPS6247763A (en) * 1985-08-27 1987-03-02 Nec Corp Data outputting system from data processor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153554A (en) * 1984-01-23 1985-08-13 Hitachi Ltd Input/output control circuit
JPS60246457A (en) * 1984-05-21 1985-12-06 Fujitsu Ltd Memory access controlling circuit
JPH0347542B2 (en) * 1984-05-21 1991-07-19 Fujitsu Ltd
JPS6247763A (en) * 1985-08-27 1987-03-02 Nec Corp Data outputting system from data processor

Also Published As

Publication number Publication date
JPS6055859B2 (en) 1985-12-06

Similar Documents

Publication Publication Date Title
JPS5492137A (en) Buffer setting system
JPS5744277A (en) Information processor
ES8801049A1 (en) Interface arrangement.
JPS57205885A (en) Channel buffer controlling system
JPS6437640A (en) Control system for cache memory
JPS56169281A (en) Data processor
JPS5733472A (en) Memory access control system
JPS559228A (en) Memory request control system
JPS56143032A (en) Operation and control system for data processing system
JPS56100586A (en) Ipl system in decentralized processing electronic exchanger
JPS5730169A (en) Cash memory control system
JPS6478359A (en) Dual microprocessor control system
JPS56129473A (en) Facsimile device with memory device
JPS57211630A (en) Channel scanning system
JPS5750378A (en) Control system of data processor
JPS57209525A (en) Access controlling system for channel buffer
JPS5717067A (en) Conflict control system of common memory
JPS6488841A (en) Buffer memory access control system
JPS52120731A (en) Refresh control circuit
JPS57137938A (en) Data processor
Dooley Wang to interface OA with IBM.
JPS5733479A (en) Buffer invalidation control system
JPS57157333A (en) Memory address control system
JPS6450157A (en) Multi-processor control system
JPS52125240A (en) Data arrangement control system