JPS6458004A - Control circuit - Google Patents

Control circuit

Info

Publication number
JPS6458004A
JPS6458004A JP62215924A JP21592487A JPS6458004A JP S6458004 A JPS6458004 A JP S6458004A JP 62215924 A JP62215924 A JP 62215924A JP 21592487 A JP21592487 A JP 21592487A JP S6458004 A JPS6458004 A JP S6458004A
Authority
JP
Japan
Prior art keywords
level
turned
power supply
pout
port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62215924A
Other languages
Japanese (ja)
Inventor
Yutaro Morishita
Yoshiyuki Katayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kubota Corp
Original Assignee
Kubota Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kubota Corp filed Critical Kubota Corp
Priority to JP62215924A priority Critical patent/JPS6458004A/en
Publication of JPS6458004A publication Critical patent/JPS6458004A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the runaway of a device by stopping the working of a power supply circuit after a prescribed processing action when a power supply switch is turned off. CONSTITUTION:An output port Pout is set at 'Hi' level when it is known that a power supply switch SW1 is turned on after detecting that an input port Pin is set at 'Lo' level. Thus the transistors TR2 and TR3 are turned on with the base side of a TR4 kept at 'Hi' level. Then the voltage is continuously impressed to a power supply circuit 2 from a battery 3 via the TR4. When the switch SW1 is opened, the base side of a TR1 is set at 'Lo' level with the port Pin of a control part 1 set at 'Hi' level respectively. The part 1 knows that the SW1 is turned off when the port Pin is set at 'Hi' level and carries out the prescribed processing to set the port Pout at 'Lo' level. When the Pout is set at 'Lo' level, the TR2-TR4 are turned off and no voltage is impressed to the circuit 2 from the battery 3.
JP62215924A 1987-08-28 1987-08-28 Control circuit Pending JPS6458004A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62215924A JPS6458004A (en) 1987-08-28 1987-08-28 Control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62215924A JPS6458004A (en) 1987-08-28 1987-08-28 Control circuit

Publications (1)

Publication Number Publication Date
JPS6458004A true JPS6458004A (en) 1989-03-06

Family

ID=16680517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62215924A Pending JPS6458004A (en) 1987-08-28 1987-08-28 Control circuit

Country Status (1)

Country Link
JP (1) JPS6458004A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57125423A (en) * 1981-01-28 1982-08-04 Jeco Co Ltd Power supply device for battery driven microcomputer
JPS60108923A (en) * 1983-11-18 1985-06-14 Hitachi Tobu Semiconductor Ltd Microcomputer system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57125423A (en) * 1981-01-28 1982-08-04 Jeco Co Ltd Power supply device for battery driven microcomputer
JPS60108923A (en) * 1983-11-18 1985-06-14 Hitachi Tobu Semiconductor Ltd Microcomputer system

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