JPS6416256A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6416256A
JPS6416256A JP62170921A JP17092187A JPS6416256A JP S6416256 A JPS6416256 A JP S6416256A JP 62170921 A JP62170921 A JP 62170921A JP 17092187 A JP17092187 A JP 17092187A JP S6416256 A JPS6416256 A JP S6416256A
Authority
JP
Japan
Prior art keywords
switch
circuit
power source
source circuit
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62170921A
Other languages
Japanese (ja)
Inventor
Goro Kitsukawa
Ryoichi Hori
Yoshiki Kawajiri
Takao Watabe
Takayuki Kawahara
Kiyoo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62170921A priority Critical patent/JPS6416256A/en
Publication of JPS6416256A publication Critical patent/JPS6416256A/en
Pending legal-status Critical Current

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  • Static Random-Access Memory (AREA)
  • Dc-Dc Converters (AREA)
  • Dram (AREA)

Abstract

PURPOSE:To change an operating current, by arranging transistors in impedance elements, constituting a power source circuit, to put the transistors ON/OFF. CONSTITUTION:An integral circuit 4 consists of a power source circuit 1, a load circuit group 2 and a control circuit 3. In the power source circuit 1, a switch S1 is provided in series to an impedance element Z1 while another switch S2 is provided in parallel to the element Z2. The switch S1 is put ON and the switch S2 is put OFF when the circuit is operated whereby a predetermined voltage Vp, determined by both elements Z1, Z2, is generated. On the other hand, the switch S1 is put OFF and the switch S2 is put ON when the circuit is waiting whereby the voltage Vp is kept in the potential of B. In this case, the switch S1 is being put OFF, therefore, the current consumption of the power source circuit 1 becomes zero.
JP62170921A 1987-07-10 1987-07-10 Semiconductor device Pending JPS6416256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62170921A JPS6416256A (en) 1987-07-10 1987-07-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62170921A JPS6416256A (en) 1987-07-10 1987-07-10 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6416256A true JPS6416256A (en) 1989-01-19

Family

ID=15913821

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62170921A Pending JPS6416256A (en) 1987-07-10 1987-07-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6416256A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03222195A (en) * 1990-01-25 1991-10-01 Nec Corp Sense amplification circuit
JP2005538626A (en) * 2002-09-11 2005-12-15 ディーエムビー テクノロジー カンパニー リミテッド Pop noise elimination circuit and pop noise elimination method in digital audio amplifier using dual power supply

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03222195A (en) * 1990-01-25 1991-10-01 Nec Corp Sense amplification circuit
JP2005538626A (en) * 2002-09-11 2005-12-15 ディーエムビー テクノロジー カンパニー リミテッド Pop noise elimination circuit and pop noise elimination method in digital audio amplifier using dual power supply

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