JPS6455832A - Mounting method for semiconductor element - Google Patents

Mounting method for semiconductor element

Info

Publication number
JPS6455832A
JPS6455832A JP21358987A JP21358987A JPS6455832A JP S6455832 A JPS6455832 A JP S6455832A JP 21358987 A JP21358987 A JP 21358987A JP 21358987 A JP21358987 A JP 21358987A JP S6455832 A JPS6455832 A JP S6455832A
Authority
JP
Japan
Prior art keywords
sealer
sealers
face
reflow
dispenser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21358987A
Other languages
Japanese (ja)
Inventor
Hideaki Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP21358987A priority Critical patent/JPS6455832A/en
Publication of JPS6455832A publication Critical patent/JPS6455832A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To largely improve moisture resistance by coating with first sealer, then covering with second sealer, and simultaneously curing the first and second sealers. CONSTITUTION:An IC3 is mounted in a face-down manner on a glass substrate 6 of a liquid crystal panel in which liquid crystal is poured and sealed, heated to allow a solder 4 to reflow, thereby bonding it to a laminated conductor 5. After the reflow of the solder 4, it is cleaned, sealer 1 is poured by a dispenser from laterally of the IC3, and the face of the IC3, the substrate 6 and the IC3 are laterally coated with the sealer 1. Then, the rear face of the IC3, the front surface of the sealer 1, and the laminated conductor 5, are coated by a dispenser with the sealer 2, the sealers 1, 2 are then heated at 80-100 deg.C to be simultaneously cured. In this case, since a silicone oil film is formed on a boundary between the sealers 1 and 2, the moisture absorption of the sealer 1 due to moisture penetrating through the sealer 2 is suppressed under high temperature and high humidity.
JP21358987A 1987-08-27 1987-08-27 Mounting method for semiconductor element Pending JPS6455832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21358987A JPS6455832A (en) 1987-08-27 1987-08-27 Mounting method for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21358987A JPS6455832A (en) 1987-08-27 1987-08-27 Mounting method for semiconductor element

Publications (1)

Publication Number Publication Date
JPS6455832A true JPS6455832A (en) 1989-03-02

Family

ID=16641701

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21358987A Pending JPS6455832A (en) 1987-08-27 1987-08-27 Mounting method for semiconductor element

Country Status (1)

Country Link
JP (1) JPS6455832A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274913A (en) * 1991-10-25 1994-01-04 International Business Machines Corporation Method of fabricating a reworkable module
WO2000052739A3 (en) * 1999-03-03 2001-01-11 Intel Corp A controlled collapse chip connection (c4) integrated circuit package that has a filler which seals an underfill material

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274913A (en) * 1991-10-25 1994-01-04 International Business Machines Corporation Method of fabricating a reworkable module
WO2000052739A3 (en) * 1999-03-03 2001-01-11 Intel Corp A controlled collapse chip connection (c4) integrated circuit package that has a filler which seals an underfill material
US6238948B1 (en) 1999-03-03 2001-05-29 Intel Corporation Controlled collapse chip connection (C4) integrated circuit package that has a fillet which seals an underfill material

Similar Documents

Publication Publication Date Title
JPS5762539A (en) Mounting method for semiconductor element
US3570115A (en) Method for mounting electronic chips
JPS5873126A (en) Mounting method of semiconductor device
JPS6455832A (en) Mounting method for semiconductor element
JPS5670655A (en) Manufacture of electronic circuit mounting device
JPS55138241A (en) Sealing structure for semiconductor device
JPS6442183A (en) Method of packaging semiconductor device
JPS55138240A (en) Manufacture of semiconductor device
JPS5831539A (en) Manufacture of hybrid integrated circuit
JPS5713426A (en) Liquid crystal display element
JPS5742022A (en) Liquid crystal display device
JPS629728Y2 (en)
JPS6436055A (en) Method of sealing electronic component
JPS55124250A (en) Resin sealed semiconductor device
JPS62104044A (en) Passivating method
JPS57188851A (en) Method of sealing semiconductor element
JPS5760860A (en) Semiconductor
JPH03290983A (en) Manufacture of led display element
JPS5571043A (en) Semiconductor device
JPS6455850A (en) Mounting of semiconductor element
JPS5799749A (en) Semiconductor device
JPS5789229A (en) Semiconductor device
JPS59130448A (en) Device for sealing circuit element
JPS5739545A (en) Semiconductor device
JPH01225141A (en) Resin-sealed semiconductor device