JPH01225141A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH01225141A
JPH01225141A JP63051040A JP5104088A JPH01225141A JP H01225141 A JPH01225141 A JP H01225141A JP 63051040 A JP63051040 A JP 63051040A JP 5104088 A JP5104088 A JP 5104088A JP H01225141 A JPH01225141 A JP H01225141A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
section
lower face
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63051040A
Other languages
Japanese (ja)
Inventor
Taku Nakamura
卓 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63051040A priority Critical patent/JPH01225141A/en
Publication of JPH01225141A publication Critical patent/JPH01225141A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE:To prevent occurrence of resin cracks in case of mounting a semiconductor device on a printed board or the like by forming a thin film having good adhesive properties to sealing resin on the lower face of a semiconductor element placing section so that the center part of the lower face of the placing section becomes the thickest. CONSTITUTION:After a semiconductor element 6 is secured to a lead frame element placing section 2, the element is electrically connected by fine metal wirings 7 to the leads 3 of a lead frame, sealed with resin 8, and molded. Here, a thin resin layer 4 having good adhesive properties with the resin 8 is so provided on the lower face of the section 2 that the center part of the lower face of the section 2 becomes the thickest. Thus, when a semiconductor device is mounted on a printed board or the like, it alleviates to concentrate a thermal stress at the edge of the placing section due to the peeling of the resin from the center of the lower surface of the section, thereby preventing resin crack from occurring.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の構造に関し、特に、樹脂封止型半
導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a semiconductor device, and particularly to a resin-sealed semiconductor device.

〔従来の技術〕[Conventional technology]

従来、樹脂封止型半導体装置は一般にセラミック型半導
体装置などに比べて耐湿性の面で劣っていたが、樹脂自
体の技術的進歩により実用的には十分な品質が確保でき
るようになり、安価でしかも量産性に適しているという
点から、半導体装置の主流となっている。第3図はこの
ような樹脂封止型半導体装置の断面図である。第3図に
おいて、リードフレームの半導体素子搭載部2上に固着
された半導体素子6を、リード3と金線等の金属細線7
で外部に電気的接続をした後に、エポキシ樹脂等の樹脂
8で封止し、成型・加工を行なう。
In the past, resin-sealed semiconductor devices were generally inferior to ceramic-type semiconductor devices in terms of moisture resistance, but technological advances in the resin itself have made it possible to ensure sufficient quality for practical use, making them cheaper and cheaper. Moreover, it has become the mainstream of semiconductor devices because it is suitable for mass production. FIG. 3 is a sectional view of such a resin-sealed semiconductor device. In FIG. 3, a semiconductor element 6 fixed on a semiconductor element mounting portion 2 of a lead frame is connected to a lead 3 and a thin metal wire 7 such as a gold wire.
After making an electrical connection to the outside, it is sealed with a resin 8 such as epoxy resin, and then molded and processed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、このような樹脂封止型半導体装置では、
製造工程中もしくは保管中において半導体装置内に水分
が吸着され、半導体装置をプリント基板等に実装する際
に熱が加わり、この吸着された水分が蒸気となって膨張
し、大きな熱ストレスが半導体装置の封止樹脂に発生す
る。その結果として、半導体素子−樹脂、リードフレー
ム(あるいは半導体素子搭載部)−樹脂界面の剥離や樹
脂にクラック(亀裂)が生じ、水分や不純物がこの樹脂
クラックから侵入したり、剥離部にたまったりして耐湿
性、すなわち、品質を著しく低下させるという欠点を有
している。
However, in such resin-sealed semiconductor devices,
Moisture is adsorbed inside the semiconductor device during the manufacturing process or during storage, and heat is added when the semiconductor device is mounted on a printed circuit board, etc., and this adsorbed moisture turns into steam and expands, causing large thermal stress to the semiconductor device. Occurs in the sealing resin. As a result, peeling occurs at the semiconductor element-resin, lead frame (or semiconductor element mounting part)-resin interface, and cracks occur in the resin, allowing moisture and impurities to enter through the resin cracks or accumulate in the peeled parts. However, it has the disadvantage of significantly lowering its moisture resistance, that is, its quality.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点に対し本発明では、半導体素子を搭載する半
導体素子搭載部の下面に、封止樹脂と密着性のよい薄膜
を中央部が最も厚くなるように形成しておいて、封止樹
脂との密着性を改善し、実装時の熱ストレスを緩和し、
界面の剥離やクラックを防いでいる。
In order to solve the above problems, the present invention forms a thin film that has good adhesion to the sealing resin on the lower surface of the semiconductor element mounting part where the semiconductor element is mounted, so that it is thickest in the center. improves adhesion and alleviates thermal stress during mounting.
Prevents peeling and cracking at the interface.

〔実施例〕〔Example〕

次に、本発明を実施例により説明する。 Next, the present invention will be explained by examples.

第1図は本発明の実施例1である樹脂封止型半導体装置
の断面図である。第1図において、リードフレーム素子
搭載部2にAu−3i共晶もしくはAgペーストで半導
体素子6を固着した後Au線等の金属細線7で素子とリ
ードフレームのり−ド3を電気的に接続し、エポキシ樹
脂等の樹脂8で素子を封止し、成型・加工を行なうが、
素子搭載部2の下面中央部が最も厚くなるように封止樹
脂との密着性が良好な薄い樹脂の層4を素子搭載部2の
下面に設けている。このような樹脂としては、シリコー
ン樹脂、ポリイミド樹脂、液晶エポキシ樹脂などの封止
樹脂と密着性が良いのもであればどれでもよく、安価に
、しかも、ポツティング等で容易に形成できる。これに
より、半導体装置をプリント基板等に実装する際に、素
子搭載部下面中央部から樹脂が剥れて素子搭載部エツジ
(端部)に熱ストレスが集中するのを緩和し、樹脂クラ
ックの発生を防ぐことができる。したがって、実装後に
おいてもその半導体装置自体の耐湿性、すなわち、品質
を維持できることになる。
FIG. 1 is a sectional view of a resin-sealed semiconductor device according to a first embodiment of the present invention. In FIG. 1, after a semiconductor element 6 is fixed to the lead frame element mounting part 2 with Au-3i eutectic or Ag paste, the element and lead frame glue 3 are electrically connected with a thin metal wire 7 such as an Au wire. , the element is sealed with resin 8 such as epoxy resin, and molded and processed.
A thin resin layer 4 having good adhesion to the sealing resin is provided on the lower surface of the element mounting portion 2 so that the center portion of the lower surface of the element mounting portion 2 is thickest. Any resin may be used as such resin as long as it has good adhesion to the sealing resin such as silicone resin, polyimide resin, liquid crystal epoxy resin, etc., and can be formed easily at low cost by potting or the like. As a result, when mounting a semiconductor device on a printed circuit board, etc., the resin peels off from the center of the lower surface where the element is mounted, reducing the concentration of thermal stress on the edge of the element mounting area, and causing resin cracks. can be prevented. Therefore, even after mounting, the moisture resistance, that is, the quality of the semiconductor device itself can be maintained.

第2図は本発明の実施例2に係るリードフレーム裏面の
平面図である。第2図において、リードフレーム1の一
部である半導体素子搭載部2の裏面に、シリコン酸化膜
(Sin2)やシリコン窒化膜(SiN)のような薄膜
5をマスクにより中央部が厚く密に、周辺部が薄くまば
らになるように形成する。このようなリードフレームを
用い、実施例1と同様に半導体装置を製造する。これに
より、半導体装置を実装する際に発生する界面の剥離や
樹脂クラックを防ぎ、実装後においても耐湿性の良好な
高品質の半導体装置を提供することができる。
FIG. 2 is a plan view of the back side of a lead frame according to Example 2 of the present invention. In FIG. 2, a thin film 5 such as a silicon oxide film (Sin2) or a silicon nitride film (SiN) is formed on the back surface of a semiconductor element mounting part 2, which is a part of a lead frame 1, by using a mask so that the central part is thick and dense. Form so that the peripheral part is thin and sparse. Using such a lead frame, a semiconductor device is manufactured in the same manner as in Example 1. Thereby, it is possible to prevent peeling of the interface and resin cracks that occur when mounting the semiconductor device, and to provide a high-quality semiconductor device with good moisture resistance even after mounting.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明は、半導体素子搭載部下面の中央
部が最も厚くなるような封止樹脂との密着性が良好な薄
膜を半導体素子搭載部下面の全面あるいは一部分に形成
することにより、半導体素子搭載部中央部から発生しや
すい搭載部−樹脂界面の剥離を抑え、搭載部のエツジ(
端部)に集中する熱ストレスを緩和し、半導体装置をプ
リント基板等に実装する際に起こる樹脂クラックを防止
でき、ひいては樹脂クラックを介して外部から半導体装
置内に侵入して界面剥離部にたまる水分、不純物をなく
し、これらの水分・不純物による半導体素子の金属配線
の腐食を防止して、その半導体装置自体の耐湿性を長期
間維持できるという効果を有している。
As described above, the present invention provides a thin film that has good adhesion to the sealing resin and is thickest at the center of the lower surface where the semiconductor element is mounted. It suppresses peeling of the mounting part-resin interface that tends to occur from the center of the semiconductor element mounting part, and prevents the edges of the mounting part (
It can alleviate the thermal stress concentrated at the edges) and prevent resin cracks that occur when semiconductor devices are mounted on printed circuit boards, etc., and can even penetrate into the semiconductor device from the outside through the resin cracks and accumulate at the interface peeling area. It has the effect of eliminating moisture and impurities, preventing corrosion of the metal wiring of the semiconductor element due to these moisture and impurities, and maintaining the moisture resistance of the semiconductor device itself for a long period of time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例1である樹脂封止型半導体装置
の断面図、第2図は実施例2に係るy−ドフレーム裏面
の平面図、第3図は従来の樹脂封止型半導体装置の断面
図である。 1・・・・・・リードフレーム、2・・・・・・半導体
素子搭載部、3・・・・・・リード、4,5・・・・・
・樹脂密着増加用薄膜、6・・・・・・半導体素子、7
・・・・・・金属細線、8・旧・・封止樹脂。 代理人 弁理士  内 原   晋
FIG. 1 is a cross-sectional view of a resin-sealed semiconductor device according to a first embodiment of the present invention, FIG. 2 is a plan view of the back side of a y-board frame according to a second embodiment, and FIG. 3 is a conventional resin-sealed semiconductor device. FIG. 2 is a cross-sectional view of a semiconductor device. 1... Lead frame, 2... Semiconductor element mounting part, 3... Lead, 4, 5...
・Thin film for increasing resin adhesion, 6...Semiconductor element, 7
・・・・・・Thin metal wire, 8・Old・Sealing resin. Agent Patent Attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims]  リードフレームの半導体素子搭載部に半導体素子を搭
載し樹脂封止した半導体装置において、前記半導体素子
搭載部の下面に前記封止樹脂との密着性のよい薄膜が中
央部で最も厚くなるように形成されていることを特徴と
する樹脂封止型半導体装置。
In a semiconductor device in which a semiconductor element is mounted on a semiconductor element mounting part of a lead frame and sealed with resin, a thin film having good adhesion with the sealing resin is formed on the lower surface of the semiconductor element mounting part so that it is thickest in the center part. A resin-sealed semiconductor device characterized by:
JP63051040A 1988-03-03 1988-03-03 Resin-sealed semiconductor device Pending JPH01225141A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63051040A JPH01225141A (en) 1988-03-03 1988-03-03 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63051040A JPH01225141A (en) 1988-03-03 1988-03-03 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH01225141A true JPH01225141A (en) 1989-09-08

Family

ID=12875688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63051040A Pending JPH01225141A (en) 1988-03-03 1988-03-03 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH01225141A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0433695A2 (en) * 1989-12-22 1991-06-26 Texas Instruments Incorporated Integrated circuit device and method to prevent cracking during surface mount
JP2007251217A (en) * 2007-07-06 2007-09-27 Renesas Technology Corp Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0433695A2 (en) * 1989-12-22 1991-06-26 Texas Instruments Incorporated Integrated circuit device and method to prevent cracking during surface mount
EP0433695A3 (en) * 1989-12-22 1991-10-02 Texas Instruments Incorporated Integrated circuit device and method to prevent cracking during surface mount
JP2007251217A (en) * 2007-07-06 2007-09-27 Renesas Technology Corp Semiconductor device

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