JPH0562977A - Bump electrode of integrated circuit device - Google Patents

Bump electrode of integrated circuit device

Info

Publication number
JPH0562977A
JPH0562977A JP22081991A JP22081991A JPH0562977A JP H0562977 A JPH0562977 A JP H0562977A JP 22081991 A JP22081991 A JP 22081991A JP 22081991 A JP22081991 A JP 22081991A JP H0562977 A JPH0562977 A JP H0562977A
Authority
JP
Japan
Prior art keywords
bump electrode
chip
height
conductive resin
bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22081991A
Other languages
Japanese (ja)
Inventor
Ken Meguro
謙 目黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP22081991A priority Critical patent/JPH0562977A/en
Publication of JPH0562977A publication Critical patent/JPH0562977A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable the bump electrodes of an integrated circuit device bonded and connected to a mounting object through the intermediary of conductive resin at mounting to be lessened in arrangement pitch in a chip. CONSTITUTION:A bump electrode 21 is composed of a pillar-shaped main body 21 whose circumferential face stands vertically from the surface of a chip 10 and a cap-shaped top 22 which protrudes laterally from the circumferential face of the main body 21, where the height (h) of the top 22 is set as large as 5-25% of the overall height H of the electrode 21, and the circumferential edge 22a of the top 22 is made to face obliquely to form a protrudent curved surface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は集積回路のいわゆるフリ
ップチップに用いられるバンプ電極であって実装時に導
電性樹脂を介して相手方と接着かつ接続されるものに関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to bump electrodes used in so-called flip chips of integrated circuits, which are bonded and connected to a counterpart through a conductive resin during mounting.

【0002】[0002]

【従来の技術】バンプ電極を備えるフリップチップとし
て構成された集積回路装置は、周知のとおりチップの状
態のままで配線基板等に直接実装されるもので、パッケ
ージに一旦収納した後に実装する場合に比べて余分な手
間を省いて種々な製品のコストを低減でき、しかも実装
に要するスペースを節約して装置を小形化できる利点が
あるため、電子装置類,例えば表示装置や印字装置等の
主には量産装置に用いるとくにチップ当たりの外部との
接続点数の多い場合に適する集積回路装置として広く採
用されるに至っている。
2. Description of the Related Art As is well known, an integrated circuit device configured as a flip chip having bump electrodes is directly mounted on a wiring board or the like in a chip state, and is mounted in a package once and then mounted. Compared with this, it is possible to reduce the cost of various products by saving extra labor, and moreover, it is possible to reduce the space required for mounting and to downsize the device. Therefore, it is mainly used for electronic devices such as display devices and printing devices. Has been widely adopted as an integrated circuit device suitable for mass-production devices, especially when there are many external connection points per chip.

【0003】このフリップチップの実装に当たっては、
従来からその金,銅,はんだ等からなるバンプ電極を実
装相手方である配線基板等の配線導体に熱圧接やはんだ
付けにより接合することが多いが、接合には 300〜500
℃の高温とバンプ電極あたり数十gの圧力が必要なの
で、量産時の実装速度の向上に限界がありかつ接合中に
バンプ電極やチップが損傷を受けるおそれを完全には排
除できない。このため、フリップチップの電流容量があ
まり大きくない場合は、導電性樹脂によりバンプ電極を
相手方に接着かつ接続する実装方法が有利になって来
る。本発明はかかる導電性樹脂を利用する実装に適する
フリップチップ用のバンプ電極に関し、以下図3を参照
しながらその従来技術を説明する。
When mounting this flip chip,
Conventionally, the bump electrodes made of gold, copper, solder, etc. are often joined to the wiring conductor such as the wiring board, which is the mounting partner, by thermocompression bonding or soldering.
Since a high temperature of ° C and a pressure of several tens of g are required for each bump electrode, there is a limit to the improvement of the mounting speed during mass production, and the risk that the bump electrode or the chip is damaged during bonding cannot be completely eliminated. Therefore, when the current capacity of the flip chip is not so large, the mounting method of bonding and connecting the bump electrode to the other party by the conductive resin becomes advantageous. The present invention relates to a flip chip bump electrode suitable for mounting using such a conductive resin, and a conventional technique thereof will be described below with reference to FIG.

【0004】図3(a) にチップ10にバンプ電極20を設け
る要領を, 図3(b) のこのチップ10を配線基板30に実装
する要領をそれぞれ示す。図3(a) は半導体領域1内に
集積回路が作り込まれたチップ10のごく一部の拡大断面
である。半導体領域1の表面を覆う絶縁膜2上に集積回
路と接続されたアルミの金属膜3が配設されており、バ
ンプ電極20はそれを覆う保護膜4に開口した窓内に露出
された金属膜3に接続するよう設けられる。バンプ電極
20用に金属を電解めっき法で成長させるための下地とし
て、窓内で金属膜3と接続されるチタン等からなる下側
下地膜5と銅等からなる上側下地膜6をごく薄い膜厚で
被着し、上側下地膜5を保護膜4の窓とほぼ同サイズに
フォトエッチングによりパターンニングする。
FIG. 3 (a) shows the procedure for providing the bump electrodes 20 on the chip 10, and FIG. 3 (b) shows the procedure for mounting the chip 10 on the wiring board 30. FIG. 3A is an enlarged cross-sectional view of a very small part of the chip 10 in which the integrated circuit is formed in the semiconductor region 1. An aluminum metal film 3 connected to an integrated circuit is provided on an insulating film 2 that covers the surface of the semiconductor region 1. The bump electrode 20 is a metal exposed in a window opened in a protective film 4 that covers the bump electrode 20. It is provided to connect to the membrane 3. Bump electrode
As a base for growing a metal for the 20 by electrolytic plating, a lower base film 5 made of titanium or the like and an upper base film 6 made of copper or the like connected to the metal film 3 in the window are formed with a very thin film thickness. Then, the upper base film 5 is patterned by photoetching so that the upper base film 5 has substantially the same size as the window of the protective film 4.

【0005】次に、電解めっき用のマスク膜Mとしてフ
ォトレジストからなるマスク膜Mをスピンコートし、フ
ォトプロセスにより上側下地膜6のみを露出させるよう
窓を開口する。バンプ電極20用の金属は通例のように下
側下地膜5をめっき電極膜とする電解めっき法によって
上側下地膜6の上に成長されるが、バンプ電極20には最
低でも数十μmの高さが必要なのでそれ用の金属はマス
ク膜Mの窓内を埋めた後にさらに図のように高く成長さ
れ、この際にそのマスク膜Mの上側部分が図示のように
側方にかなり張り出して電解めっきされるので、バンプ
電極20は首23が短くて大きな笠24をもつ茸状に形成され
る。
Next, a mask film M made of photoresist is spin-coated as a mask film M for electrolytic plating, and a window is opened by a photo process so that only the upper base film 6 is exposed. The metal for the bump electrode 20 is usually grown on the upper base film 6 by the electrolytic plating method using the lower base film 5 as a plating electrode film. Therefore, the metal for that purpose is grown higher as shown in the figure after filling the inside of the window of the mask film M. At this time, the upper portion of the mask film M is considerably projected laterally as shown in the figure and electrolysis is performed. Since it is plated, the bump electrode 20 is formed in a mushroom shape having a short neck 23 and a large cap 24.

【0006】図3(b) に示す実装状態では、フリップチ
ップ10はバンプ電極20が突設された表面を下に向けた姿
勢で配線基板30等の上にいわゆるフェースダウン方式で
実装されるが、導電性樹脂40を利用する場合はいわゆる
COG (Chip On Glass)方式で実装される場合が多い。
この際の配線基板30にはガラス等の透明な絶縁基板31の
上にITO (インジウム錫酸化物) 等の 0.5μm以下の
ごく薄い導電性膜からなる配線導体32を多数並べて配設
したものを用い、導電性樹脂40には例えば銀とパラジュ
ウムの微粉を含む Ag-Pd系樹脂ペーストを用いる。
In the mounting state shown in FIG. 3 (b), the flip chip 10 is mounted on the wiring board 30 or the like by a so-called face-down method with the surface on which the bump electrode 20 is projected facing downward. When the conductive resin 40 is used, it is often mounted by a so-called COG (Chip On Glass) method.
At this time, the wiring board 30 is formed by arranging a large number of wiring conductors 32 made of a very thin conductive film of 0.5 μm or less such as ITO (indium tin oxide) on a transparent insulating substrate 31 such as glass. As the conductive resin 40, for example, an Ag-Pd resin paste containing fine powder of silver and palladium is used.

【0007】実装作業に当たっては、バンプ電極20の先
端の笠24に導電性樹脂40を所定微量だけあらかじめ付け
て置いたチップ10を、ふつう 100℃程度の温度に加熱さ
れた配線基板30の上に位置決め載置した上で、バンプ電
極20あたり1g以下の僅かな圧力で押し付けた状態で導
電性樹脂40を硬化させることにより、バンプ電極20を配
線導体32に接着すると同時に接続を果たす。この実装中
に笠24と配線導体32の相互間の導電性樹脂40は側方に押
し出されて若干は広がるが、図のように笠24の範囲から
あまり食み出さない状態で硬化させることができる。こ
れにより、実装作業をふつう10〜20秒の短時間内に終え
ることができ、かつ多数のバンプ電極20の高さにかなり
のばらつきがあっても導電性樹脂40により吸収されて確
実な接続状態が保証される。
In the mounting work, the chip 10 in which the conductive resin 40 is preliminarily attached to the cap 24 at the tip of the bump electrode 20 by a predetermined minute amount is placed on the wiring board 30 which is usually heated to a temperature of about 100.degree. After the positioning and mounting, the conductive resin 40 is cured while being pressed with a slight pressure of 1 g or less per bump electrode 20, whereby the bump electrode 20 is bonded to the wiring conductor 32 and at the same time the connection is achieved. During this mounting, the conductive resin 40 between the shade 24 and the wiring conductor 32 is pushed out to the side and spreads out a little, but as shown in the figure, it can be hardened in a state where it does not protrude much from the range of the shade 24. it can. As a result, the mounting work can be normally completed within a short time of 10 to 20 seconds, and even if there are considerable variations in the height of many bump electrodes 20, they are absorbed by the conductive resin 40 to ensure a reliable connection state. Is guaranteed.

【0008】[0008]

【発明が解決しようとする課題】以上のように、導電性
樹脂を利用するフリップチップの実装には多くの利点が
あるが、図3のような平たな茸状のバンプ電極20ではそ
のいわば本体である首23に対して笠24の幅がその2〜3
倍に広がるので、同図(b) のバンプ電極20の配列ピッチ
Pをある限度以下, ふつうは 100μm程度以下には縮小
できず、このため最近のように集積回路装置の高集積化
が進んでそのチップサイズが小形化されて来ると、外部
接続点数が 100個程度以上のフリップチップ10ではバン
プ電極20をその限られたチップ面積内に合理的に配列す
るのが非常に困難になって来る問題がある。この様子を
図4に示す。
As described above, the flip-chip mounting using the conductive resin has many advantages, but the flat mushroom-shaped bump electrode 20 as shown in FIG. 3 is, so to speak, so to speak. The width of the cap 24 is 2 to 3 with respect to the neck 23 which is the main body.
Since the array pitch P of the bump electrodes 20 in FIG. 2 (b) cannot be reduced to a certain limit or less, usually about 100 μm or less, the integrated circuit device is highly integrated as in recent years. As the chip size becomes smaller, it becomes very difficult to reasonably arrange the bump electrodes 20 within the limited chip area in the flip chip 10 having 100 or more external connection points. There's a problem. This state is shown in FIG.

【0009】図4(a) のようにバンプ電極20のサイズが
小さな場合は、周知のようにバンプ電極20をチップ10の
周縁部に狭いピッチPで配列するのがチップ面積を有効
利用する上で望ましいが、バンプ電極20の径が例えば2
倍になるとピッチPを 1.5倍程度に広げる必要があるた
め、チップサイズを増すかあるいは図4(b) のようにバ
ンプ電極20をチップ10の内部にも配列しなければならな
くなる。前者の場合は集積度が約半分に低下し、後者の
場合でも内部に配列されたバンプ電極20の付近がむだな
スペースになりやすいのでかなりの集積度低下を免れ
ず、内部配列数がとくに多いと集積度が半分以下に低下
してしまう。
When the size of the bump electrodes 20 is small as shown in FIG. 4A, it is well known that the bump electrodes 20 are arranged at a narrow pitch P on the peripheral portion of the chip 10 in order to effectively use the chip area. However, the diameter of the bump electrode 20 is, for example, 2
Since it is necessary to increase the pitch P by about 1.5 times when the number of times is doubled, it is necessary to increase the chip size or arrange the bump electrodes 20 inside the chip 10 as shown in FIG. 4 (b). In the former case, the degree of integration is reduced to about half, and in the latter case, the area around the bump electrodes 20 arranged inside tends to be a wasted space, so a considerable decrease in the degree of integration is unavoidable, and the number of internal arrangements is particularly large. And the integration level drops to less than half.

【0010】この問題の解決のため、バンプ電極20を図
5に示す形状に形成することは可能である。これは、図
3のバンプ電極20では首23であった部分だけを所望の高
さに成長させるもので、このためには図5(a) に示すよ
うにマスク膜Mを数十μmの厚みに付けて窓を開口して
置き、この窓内にバンプ電極20用の金属を電解めっきで
窓から食み出さない限度内で柱状の本体25として成長さ
せれば、図3のような笠24の首23からの側方への張り出
すのをなくしてバンプ電極20のサイズを図3の場合の半
分以下に縮小できる。
To solve this problem, the bump electrode 20 can be formed in the shape shown in FIG. This is to grow only the neck 23 of the bump electrode 20 in FIG. 3 to a desired height. For this purpose, as shown in FIG. 5 (a), the mask film M has a thickness of several tens of μm. If a metal for bump electrode 20 is grown as a columnar main body 25 within the window by electrolytic plating within the window, the cap 24 as shown in FIG. It is possible to reduce the size of the bump electrode 20 to less than half that in the case of FIG. 3 without protruding laterally from the neck 23.

【0011】ところが、図5(b) に示すようにかかる柱
状のバンプ電極20を備えるフリップチップ10を配線基板
30に実装して見ると、加熱された導電性樹脂40が硬化す
る前のまだ流動性が高い内に絶縁基板31の表面に沿って
流れるため接続点相互間に図のような短絡Sが発生しや
すく、これを完全に防止するにはバンプ電極20の配列ピ
ッチPを図3の場合と同程度にする必要があることが判
明した。
However, as shown in FIG. 5B, the flip chip 10 having the columnar bump electrodes 20 is mounted on the wiring board.
When it is mounted on 30, the heated conductive resin 40 flows along the surface of the insulating substrate 31 while the conductive resin 40 is still highly fluid before being cured, so that a short circuit S occurs between the connection points as shown in the figure. It has been found that the arrangement pitch P of the bump electrodes 20 needs to be about the same as in the case of FIG. 3 in order to completely prevent this.

【0012】以上のように、導電性樹脂を利用して実装
されるフリップチップの従来からのバンプ電極ではその
配列ピッチを数十μm程度にまで縮小するのは非常に困
難であり、集積回路装置の高集積化を図る上での隘路に
なっているのが現状である。本発明はかかる事情から、
フリップチップ上の配列ピッチを従来より縮小できるバ
ンプ電極を提供することを目的とする。
As described above, it is very difficult to reduce the arrangement pitch of the conventional bump electrodes of the flip chip mounted by using the conductive resin to about several tens of μm, and the integrated circuit device. The current situation is that it is a bottleneck for higher integration. The present invention is based on such circumstances
It is an object of the present invention to provide a bump electrode capable of reducing the array pitch on the flip chip as compared with the conventional one.

【0013】[0013]

【課題を解決するための手段】この目的は本発明によれ
ば、フリップチップの表面からほぼ縦方向に真っ直ぐ立
ち上がる周面をもつ柱状の本体部とその外周から横方向
に張り出した平笠状の先端部を備える茸状に形成され、
先端部が本体部と合わせたバンプ電極の全体の高さの5
〜25%の高さに形成され、かつ先端部の周縁が斜方向に
向け凸な曲面に形成されたバンプ電極によって達成され
る。
According to the present invention, the object is to provide a columnar main body having a peripheral surface that rises substantially vertically from the surface of the flip chip, and a flat hat-shaped tip protruding laterally from the outer periphery thereof. It is formed in a mushroom shape with a part,
The total height of the bump electrode with the tip and the body is 5
This is achieved by a bump electrode which is formed to have a height of -25% and whose peripheral edge is formed in a curved surface which is convex in the oblique direction.

【0014】なお、上述の先端部の高さは全体高さの10
〜20%とするのがさらに望ましく、本体部の高さが10〜
40μmの小形のバンプ電極では先端部の高さを2〜10μ
m,より望ましくは5〜10μmの範囲内にするのがよ
い。また、本発明のバンプ電極を備えるフリップチップ
を相手方に実装する際には、従来どおりバンプ電極側に
導電性樹脂を付けて置いた上で所定の硬化温度に保たれ
た相手方の上に載置するのがよく、この際のバンプ電極
への導電性樹脂の付着量を正確に管理するには、導電性
樹脂が所定の厚みに塗着された治具の表面にバンプ電極
の先端部の表面を接触させることにより導電性樹脂をバ
ンプ電極に付けるのが有利である。導電性樹脂を硬化さ
せる間にフリップチップを相手方に押し付ける圧力は、
バンプ電極あたり1g以下,望ましくは 0.5g以下とす
るのがよい。
It should be noted that the height of the above-mentioned tip portion is 10 of the total height.
~ 20% is more desirable, the height of the body is 10 ~
For small bump electrodes of 40 μm, the height of the tip is 2 to 10 μm.
m, more preferably 5 to 10 μm. Further, when mounting the flip chip having the bump electrode of the present invention on the other side, the bump electrode side is attached with a conductive resin as in the conventional case and then placed on the other side kept at a predetermined curing temperature. To accurately control the amount of conductive resin adhered to the bump electrodes at this time, the surface of the tip of the bump electrode should be attached to the surface of the jig where the conductive resin is applied to a specified thickness. It is advantageous to attach the conductive resin to the bump electrodes by bringing them into contact with each other. The pressure to press the flip chip against the other party while curing the conductive resin is
The amount per bump electrode is preferably 1 g or less, more preferably 0.5 g or less.

【0015】[0015]

【作用】本願発明者の実験結果によれば、図3の笠24は
バンプ電極20が横に広がる短所はあるものの、導電性樹
脂40が図5のように実装相手方の面に沿って流れるのを
防ぐ長所があり、図3の首23からこの笠24が横に張り出
す程度はその高さにほぼ比例する。そこで、本発明では
従来とは逆にバンプ電極の首23に相当する柱状の本体部
の高さを大きく, 笠24に相当する平笠状の先端部の高さ
を小さく形成し、バンプ電極の横への広がりを抑えつつ
導電性樹脂の横方向の流れを防止することによりバンプ
電極の配列ピッチを従来より短縮する。このため、本発
明では前項の構成にいうようにバンプ電極の先端部を全
体高さの5〜25%の高さに形成して先端部の本体部から
の横への張り出しを同程度に抑える。
According to the experimental results of the inventor of the present application, although the bump 24 has the disadvantage that the bump electrode 20 spreads laterally in the shade 24 of FIG. 3, the conductive resin 40 flows along the surface of the mounting partner as shown in FIG. This has the advantage of preventing the above, and the extent to which this shade 24 extends laterally from the neck 23 in FIG. 3 is approximately proportional to its height. Therefore, in the present invention, contrary to the conventional case, the height of the columnar main body portion corresponding to the neck 23 of the bump electrode is increased, and the height of the flat hat-shaped tip portion corresponding to the shade 24 is formed to be small, and The arrangement pitch of the bump electrodes is shortened as compared with the conventional one by preventing the conductive resin from flowing in the lateral direction while suppressing the spread of the bumps. For this reason, in the present invention, the tip portion of the bump electrode is formed to have a height of 5 to 25% of the total height as described in the above-mentioned configuration, and the lateral extension of the tip portion from the main body portion is suppressed to the same extent. ..

【0016】さらに本発明は、バンプ電極用の金属を成
長させる際の電解めっきがもつ特質を利用してその先端
部の周縁を斜方向に向けて凸な曲面に形成することによ
り、実装時に先端部と相手方の相互間から押し出される
余剰な導電性樹脂をこの曲面ないしはそれに続く先端部
の本体部からの張り出し部分に保持させて、硬化前の導
電性樹脂の横方向への流れ出しを一層確実に防止し、か
つ硬化後の導電性樹脂による接着強度を強化するように
したものである。
Further, according to the present invention, by utilizing the characteristic of electrolytic plating when growing a metal for a bump electrode, the peripheral edge of the tip end portion is formed in a convex curved surface in an oblique direction, so that the tip end at the time of mounting. Excessive conductive resin extruded from between the part and the other side is held on this curved surface or the protruding part of the subsequent tip part from the main body part, so that the conductive resin before curing can flow out more securely. It is intended to prevent and strengthen the adhesive strength of the conductive resin after curing.

【0017】[0017]

【実施例】以下、図面を参照して本発明の実施例を説明
する。図1は本発明によるバンプ電極とそれを備える集
積回路装置のフリップチップを実装する要領を示し、図
2はこのバンプ電極の製造方法を示す。なお、これら図
中の前に説明した図3以降と同じ部分に同じ符号が付け
られているので、重複する部分に対する説明は適宜省略
することとする。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a method of mounting a bump electrode according to the present invention and a flip chip of an integrated circuit device having the bump electrode, and FIG. 2 shows a method of manufacturing the bump electrode. Note that the same reference numerals are given to the same portions as those in FIG. 3 and subsequent figures described above in these figures, and thus the description of the overlapping portions will be appropriately omitted.

【0018】図1(a) は本発明のバンプ電極20を示すチ
ップ10の一部の拡大断面図である。このバンプ電極20
は、本発明においても従来と同様に保護膜4に開口され
た窓内で金属膜3と導電接触する下側下地膜5をめっき
電極膜として上側下地膜6上に金や銅等の所定の金属を
電解めっき法によって茸状に成長させて形成されるが、
図3(a) の従来のバンプ電極とは茸の形状が異なり、そ
の首に当たる本体部21の高さを大きく,笠に当たる先端
部22の高さを逆に小さく形成される。図のように本体部
21はチップ面からほぼ縦方向に真っ直ぐに立ち上がる周
面をもつ柱状で、先端部22はその外周から横方向に張り
出した平笠状である。
FIG. 1A is an enlarged sectional view of a part of the chip 10 showing the bump electrode 20 of the present invention. This bump electrode 20
In the present invention, as in the prior art, the lower base film 5 which is in conductive contact with the metal film 3 in the window opened in the protective film 4 is used as a plating electrode film on the upper base film 6 and a predetermined metal such as gold or copper is used. It is formed by growing a metal into a mushroom shape by electrolytic plating.
The shape of the mushroom is different from that of the conventional bump electrode shown in FIG. 3 (a), and the height of the main body portion 21 that hits the neck is large, and the height of the tip portion 22 that hits the shade is conversely small. Main body as shown
Reference numeral 21 is a columnar shape having a peripheral surface that rises substantially vertically from the chip surface, and tip portion 22 is in the shape of a flat hat extending laterally from the outer periphery thereof.

【0019】この本発明のバンプ電極20では、先端部22
の高さhが全体の高さHの5〜25%程度,望ましくは10
〜20%とされ、かつ先端部22の周縁22aが図のように斜
方向に向けて凸な曲面に形成される。なお、この周縁22
aが本体部21の周面から張り出す程度は先端部22の高さ
hとほぼ同じになり、その中心部22bは図示のようにや
や凹な面になる。
In the bump electrode 20 of the present invention, the tip 22
The height h is about 5 to 25% of the total height H, preferably 10
.About.20%, and the peripheral edge 22a of the tip portion 22 is formed into a curved surface which is convex in the oblique direction as shown in the figure. In addition, this peripheral edge 22
The extent to which a extends from the peripheral surface of the main body portion 21 is substantially the same as the height h of the tip portion 22, and the center portion 22b thereof has a slightly concave surface as shown in the figure.

【0020】かかるバンプ電極20を備えるフリップチッ
プ10は図1(c) に示すように相手方である配線基板30に
実装されるが、同図(b) はこの実装に先立ちバンプ電極
20の先端面に導電性樹脂40をあらかじめ付着させる要領
を示す。これには、図の下側に示された治具50の平坦面
上にスピンコート法やスクリーン印刷法により導電性樹
脂40を数μm程度の所定厚みに塗着して置き、チップ10
を下向けにしてバンプ電極20の先端を治具50に接触させ
ることにより、図示のように先端部22の表面に所定微量
の導電性樹脂40を付着させるのがよい。
The flip chip 10 having the bump electrodes 20 is mounted on the other wiring board 30 as shown in FIG. 1 (c).
A procedure for preliminarily attaching the conductive resin 40 to the tip surface of 20 is shown. To this end, the conductive resin 40 is applied on the flat surface of the jig 50 shown in the lower part of the figure by a spin coating method or a screen printing method to a predetermined thickness of about several μm, and the chip 10 is placed.
By bringing the tip of the bump electrode 20 into contact with the jig 50 with the tip facing downward, it is preferable that a predetermined minute amount of the conductive resin 40 be attached to the surface of the tip portion 22 as shown in the figure.

【0021】同図(c) に示す実装工程では、相手方であ
る配線基板30を例えば 100℃前後の温度に保持し、その
上にチップ10を正確に位置決めかつ載置して軽く押し付
けた状態で導電性樹脂40を硬化させることにより、バン
プ電極20の先端部22を図示のように配線基板30の配線導
体32と接着かつ接続することでよく、この実装作業はふ
つう10〜20秒の短時間で完了する。この実装中の押し付
け圧力はバンプ電極20あたり1g以下, 望ましくは 0.1
〜0.5gとするのが適当であり、例えばバンプ電極数に
応じたグラム数の重錘をチップ10の裏面上に乗せた状態
で導電性樹脂40を硬化させるのがよい。
In the mounting step shown in FIG. 3 (c), the opponent wiring board 30 is maintained at a temperature of, for example, about 100.degree. C., and the chip 10 is accurately positioned and placed thereon and lightly pressed. By curing the conductive resin 40, the tip end portion 22 of the bump electrode 20 may be bonded and connected to the wiring conductor 32 of the wiring board 30 as shown in the drawing, and this mounting work is usually performed in a short time of 10 to 20 seconds. Complete with. The pressing pressure during this mounting is 1 g or less per bump electrode 20, preferably 0.1
It is suitable to set the weight to about 0.5 g. For example, it is preferable to cure the conductive resin 40 in a state where the weight of the number of grams corresponding to the number of bump electrodes is placed on the back surface of the chip 10.

【0022】かかる僅かな圧力下でも、硬化前の流動性
をもつ導電性樹脂40はバンプ電極20の先端部22と配線導
体32の相互間から横方向に若干押し出されるが、先端部
22の周縁22aが前述のように曲面に形成されているの
で、それと配線導体32との間の楔状の隙間内に逃げてそ
こに保持された状態で短時間後に硬化する。このように
本発明のバンプ電極20では、図1(b) の工程での導電性
樹脂40の付着量がとくに過剰でない限り、導電性樹脂40
は硬化するまでバンプ電極20の先端部22の外周の付近に
留まり、図5(b) のように配線基板30の絶縁基板31の表
面に沿って流れて短絡Sが発生するおそれはほぼ皆無に
なる。なお、配線導体32の横幅を先端部22より数〜10μ
m広いめに形成して置けば、導電性樹脂40の付着量が過
剰ぎみでも上述の楔状の隙間に保持し切れない分を本体
部21から先端部22が張り出した部分に逃がして短絡発生
を一層確実に防止できる。
Even under such a slight pressure, the conductive resin 40 having fluidity before curing is slightly extruded laterally from between the tip portion 22 of the bump electrode 20 and the wiring conductor 32.
Since the peripheral edge 22a of 22 is formed into a curved surface as described above, it escapes into the wedge-shaped gap between it and the wiring conductor 32 and is held there, and hardens after a short time. As described above, in the bump electrode 20 of the present invention, unless the amount of the conductive resin 40 deposited in the step of FIG.
Remains near the outer periphery of the tip 22 of the bump electrode 20 until it hardens, and there is almost no risk of a short circuit S occurring by flowing along the surface of the insulating substrate 31 of the wiring substrate 30 as shown in FIG. 5 (b). Become. Note that the width of the wiring conductor 32 is several to 10 μm from the tip 22.
If the conductive resin 40 is formed so as to be wider, the portion that cannot be held in the above-mentioned wedge-shaped gap even if the amount of the conductive resin 40 adheres excessively escapes from the main body portion 21 to the portion where the tip 22 overhangs to prevent a short circuit. It can be prevented more reliably.

【0023】図1のバンプ電極20はその本体部21の高さ
を10〜40μm,先端部22の高さhを2〜10μmの範囲に
するのがよく、導電性樹脂40の横方向の流れを上述のよ
うに防止できるので、バンプ電極20を本体部21の径ない
しはサイズの2倍程度か若干狭めのピッチでチップ10上
に配列できる。従って、本発明では50μmの実効径のバ
ンプ電極20を 100μm以下のピッチで配列することが可
能である。
In the bump electrode 20 of FIG. 1, it is preferable that the height of the main body portion 21 is in the range of 10 to 40 μm and the height h of the tip portion 22 is in the range of 2 to 10 μm. Since the bump electrodes 20 can be prevented as described above, the bump electrodes 20 can be arranged on the chip 10 at a pitch which is about twice the diameter or size of the main body portion 21 or slightly narrower. Therefore, according to the present invention, the bump electrodes 20 having an effective diameter of 50 μm can be arranged at a pitch of 100 μm or less.

【0024】次に図2を参照して図1のバンプ電極の製
造方法を簡単に説明する。図2(a)は半導体領域1を覆
う絶縁膜2上に配設された金属膜3と接続するバンプ電
極を設けるため保護膜4に窓を明けた状態を示す。同図
(b) はバンプ電極用下地膜の形成工程であり、チタンや
クローム等の下側下地膜5を金属膜3と接続するよう0.
2μm程度の膜厚にスパッタし、その上に銅やパラジュ
ウム等の上側下地膜6を 0.5μm程度の膜厚にスパッタ
した上でフォトエッチングによりバンプ電極用の例えば
50μm径のサイズにパターンニングする。
Next, a method of manufacturing the bump electrode of FIG. 1 will be briefly described with reference to FIG. FIG. 2A shows a state in which a window is opened in the protective film 4 for providing a bump electrode connected to the metal film 3 provided on the insulating film 2 covering the semiconductor region 1. Same figure
(b) is a step of forming a base film for bump electrodes. It is necessary to connect the lower base film 5 such as titanium or chrome to the metal film 3.
Sputtering is performed to a film thickness of about 2 μm, and an upper base film 6 such as copper or palladium is sputtered thereon to a film thickness of about 0.5 μm.
Pattern to a size of 50 μm.

【0025】図2(c) は電解めっきの準備工程であり、
フォトレジストを10〜40μmの厚みにスピンコートした
上でフォトプロセスにより上側下地膜6のみを露出させ
る窓を明けてマスク膜Mとする。同図(d) の電解めっき
工程では、通例のように下側下地膜5をめっき電極とし
て金や銅等の金属を電解めっきにより上側下地膜6上に
成長させてバンプ電極20とする。この際、そのマスク膜
Mの窓内に成長された部分が本体部21となり、窓外の例
えば2〜10μmの高さhにかつそれから外方に食み出す
ように成長された部分が先端部22となる。
FIG. 2 (c) shows a preparation process for electrolytic plating.
A photoresist is spin-coated to a thickness of 10 to 40 μm, and a window exposing only the upper base film 6 is opened by a photo process to form a mask film M. In the electroplating process of FIG. 3D, as is customary, the lower underlayer film 5 is used as a plating electrode to grow a metal such as gold or copper on the upper underlayer film 6 by electrolytic plating to form the bump electrode 20. At this time, the portion of the mask film M grown in the window becomes the main body portion 21, and the portion grown outside the window to a height h of, for example, 2 to 10 μm and protruding outward therefrom is the tip portion. 22.

【0026】この図2(d) の工程以降は、通例のように
まずマスク膜Mを除去し次にバンプ電極20と上側下地膜
6をマスクとする化学エッチングにより下側下地膜6を
除去することにより、バンプ電極20の電解めっき用相互
間接続を取り除いて図1(a)に示すバンプ電極20の完成
状態とする。なお、電解めっきによるバンプ電極20の成
長高さにはチップ10の面内で数%程度のばらつきが発生
し得るが、図1(c) の実装状態では導電性樹脂40によっ
て吸収される。
After the step shown in FIG. 2D, the mask film M is first removed as usual, and then the lower base film 6 is removed by chemical etching using the bump electrodes 20 and the upper base film 6 as a mask. As a result, the interconnections for electrolytic plating of the bump electrodes 20 are removed, and the bump electrodes 20 shown in FIG. 1A are completed. It should be noted that the growth height of the bump electrode 20 due to electrolytic plating may vary by about several percent within the surface of the chip 10, but is absorbed by the conductive resin 40 in the mounted state of FIG. 1 (c).

【0027】[0027]

【発明の効果】以上説明したように、本発明では導電性
樹脂を介して相手方に実装すべき集積回路装置用のバン
プ電極をチップ表面からほぼ縦方向に真っ直ぐ立ち上が
る周面をもつ柱状の本体部とその外周から横方向に張り
出した平笠状の先端部を備える茸状に形成し、先端部に
本体部と合わせたバンプ電極の全体の高さの5〜25%の
高さを持たせ、先端部の周縁を斜方向に向けて凸な曲面
に形成することにより、次の効果を得ることができる。
As described above, according to the present invention, the pillar-shaped main body portion having the peripheral surface in which the bump electrodes for the integrated circuit device to be mounted on the other side through the conductive resin stand upright almost vertically from the chip surface. And a mushroom-like shape with a flat-hatched tip protruding laterally from the outer periphery of the tip, and the tip has a height of 5 to 25% of the total height of the bump electrode combined with the main body. The following effects can be obtained by forming the peripheral edge of the portion in a slanting direction to form a convex curved surface.

【0028】(a) バンプ電極の本体部の高さを大に, 先
端部の高さを小に形成して、先端部によるバンプ電極の
横方向への広がりを最低に抑え、かつ実装時の導電性樹
脂の横方向の流れを先端部によって防止することによ
り、従来の茸状のバンプ電極と比べてチップ面上の配列
ピッチを半分以下に短縮できる。これにより、チップの
周縁部に従来より多数個のバンプ電極を配列できるよう
になり、集積回路装置の集積度を向上することができ
る。 (b) バンプ電極の先端部の周縁を斜方向に向けて凸な曲
面に形成して、実装時に先端部と相手方の相互間から押
し出される導電性樹脂を曲面と相手方との間の楔状の隙
間に保持させることにより、硬化前の流動性に富む導電
性樹脂が接続点から相手方の表面に沿って流れ出すのを
防止して接続点相互間の短絡のおそれをほぼ皆無にし、
かつ硬化後の導電性樹脂による接着強度を高めて接続の
信頼性を向上することができる。 (c) 導電性樹脂の硬化時間を短縮するのがその横方向へ
の流れ出しを防止する上で有利なので、本質的に高速実
装に適する。
(A) The bump electrode main body is formed to have a large height and the tip portion is formed to have a small height to minimize the lateral spread of the bump electrode by the tip portion, and at the time of mounting. By preventing the lateral flow of the conductive resin by the tip portion, the arrangement pitch on the chip surface can be reduced to half or less as compared with the conventional mushroom-shaped bump electrode. As a result, a larger number of bump electrodes can be arranged on the peripheral portion of the chip than ever before, and the integration degree of the integrated circuit device can be improved. (b) The peripheral edge of the tip of the bump electrode is formed in a convex curved surface in an oblique direction, and the conductive resin extruded from between the tip and the other side during mounting is wedge-shaped gap between the curved side and the other side. By holding at, to prevent the conductive resin rich in fluidity before curing from flowing out from the connection point along the surface of the other side, and almost eliminating the possibility of short circuit between the connection points,
In addition, the adhesive strength of the conductive resin after curing can be increased to improve the reliability of connection. (c) Since shortening the curing time of the conductive resin is advantageous for preventing the conductive resin from flowing out in the lateral direction, it is essentially suitable for high-speed mounting.

【0029】このように、本発明はフリップチップ内の
バンプ電極の配列ピッチを縮小して集積回路装置の高集
積化上の隘路を開拓し、実装時の仕損じを減少させ、実
装の信頼性を高め、かつ実装作業の能率を向上する著効
を奏し得るもので、本発明を実施することによりフリッ
プチップの小形化による経済性の向上およびその用途の
一層の拡大に貢献することができる。
As described above, according to the present invention, the arrangement pitch of the bump electrodes in the flip chip is reduced to pioneer a bottleneck in high integration of the integrated circuit device, reduce damage at the time of mounting, and improve the reliability of mounting. It is possible to obtain a remarkable effect of improving the mounting efficiency and mounting efficiency, and by implementing the present invention, it is possible to contribute to the improvement of the economical efficiency due to the miniaturization of the flip chip and the further expansion of its application.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明によるバンプ電極の実施例を示し、同図
(a) は集積回路装置のチップのバンプ電極が設けられた
部分の拡大断面図、同図(b) は実装前の準備工程を示す
チップと導電性樹脂の塗着用治具の側面図、同図(b) は
実装工程を示すチップと実装相手方の側面図である。
FIG. 1 shows an embodiment of a bump electrode according to the present invention.
(a) is an enlarged cross-sectional view of a portion of a chip of an integrated circuit device where bump electrodes are provided, and (b) is a side view of a chip and a conductive resin coating jig showing a preparatory process before mounting. Figure (b) is a side view of the chip and the mounting partner showing the mounting process.

【図2】図1のバンプ電極の製造方法を示し、同図(a)
〜(d) はそれを主な工程ごとの状態で示すチップの要部
拡大断面図である。
FIG. 2 shows a method of manufacturing the bump electrode of FIG. 1, and FIG.
6D to 6D are enlarged cross-sectional views of a main part of the chip showing it in each of the main steps.

【図3】従来技術によるバンプ電極を示し、同図(a) は
集積回路装置のチップのバンプ電極を設けた部分の拡大
断面図、同図(b) は実装状態を示すチップと実装相手方
の側面図である。
FIG. 3 shows a bump electrode according to a conventional technique, FIG. 3A is an enlarged cross-sectional view of a portion of a chip of an integrated circuit device in which a bump electrode is provided, and FIG. 3B is a chip showing a mounting state and a mounting partner. It is a side view.

【図4】バンプ電極のチップ面内の配列状態を示し、同
図(a) はバンプ電極をチップの周縁部のみに配列した場
合のチップの上面図、同図(b) はバンプ電極をチップの
中央部にも配列した場合のチップの上面図である。
4A and 4B show an arrangement state of bump electrodes on a chip surface. FIG. 4A is a top view of the chip when the bump electrodes are arranged only on a peripheral portion of the chip, and FIG. FIG. 6 is a top view of the chip when the chips are arranged also in the central part of FIG.

【図5】異なる従来技術によるバンプ電極を示し、同図
(a) は集積回路装置のチップのバンプ電極を設けた部分
の拡大断面図、同図(b) は実装状態を示すチップと実装
相手方の側面図である。
FIG. 5 is a view showing bump electrodes according to different conventional techniques.
(a) is an enlarged cross-sectional view of a portion of a chip of an integrated circuit device on which bump electrodes are provided, and (b) is a side view of a chip and a mounting partner showing a mounted state.

【符号の説明】[Explanation of symbols]

10 集積回路装置のチップ 20 バンプ電極 21 バンプ電極の本体部 22 バンプ電極の先端部 22a 先端部の周縁 30 実装相手方ないしは配線基板 32 バンプ電極が接続される配線導体 40 導電性樹脂 H バンプ電極の全体高さ h バンプ電極の先端部の高さ P バンプ電極の配列ピッチ 10 Chip of integrated circuit device 20 Bump electrode 21 Body part of bump electrode 22 Tip part of bump electrode 22a Edge of tip part 30 Mounting partner or wiring board 32 Wiring conductor to which bump electrode is connected 40 Conductive resin H Whole bump electrode Height h Height of tip of bump electrode P Pitch array pitch of bump electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】集積回路用のチップから突設され実装時に
導電性樹脂を介して相手方と接着かつ接続されるバンプ
電極であって、チップ表面からほぼ縦方向に真っ直ぐ立
ち上がる周面をもつ柱状の本体部とその外周から横方向
に張り出した平笠状の先端部を備える茸状に形成され、
先端部が本体部と合わせたバンプ電極の全体の高さの5
〜25%の高さをもち、先端部の周縁が斜方向に向け凸な
曲面に形成されたことを特徴とする集積回路装置用バン
プ電極。
1. A bump electrode projecting from a chip for an integrated circuit, which is adhered and connected to a counterpart through a conductive resin at the time of mounting, and has a columnar shape having a peripheral surface which rises substantially vertically from the chip surface. Formed in a mushroom shape with a body and a flat-hatched tip that laterally overhangs from the outer periphery,
The total height of the bump electrode with the tip and the body is 5
A bump electrode for an integrated circuit device, which has a height of -25% and whose peripheral edge is formed in a convex curved surface in an oblique direction.
【請求項2】請求項1に記載のバンプ電極において、バ
ンプ電極の先端部が全体の高さの10〜20%の高さをもつ
ように形成されたことを特徴とする集積回路装置用バン
プ電極。
2. The bump electrode for an integrated circuit device according to claim 1, wherein the tip portion of the bump electrode is formed to have a height of 10 to 20% of the total height. electrode.
【請求項3】請求項1に記載のバンプ電極において、バ
ンプ電極の本体部の高さが10〜40μmに,先端部の高さ
が2〜10μmにそれぞれされたことを特徴とする集積回
路装置用バンプ電極。
3. The bump electrode according to claim 1, wherein the height of the body of the bump electrode is 10 to 40 μm and the height of the tip is 2 to 10 μm. Bump electrode.
JP22081991A 1991-09-02 1991-09-02 Bump electrode of integrated circuit device Pending JPH0562977A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22081991A JPH0562977A (en) 1991-09-02 1991-09-02 Bump electrode of integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22081991A JPH0562977A (en) 1991-09-02 1991-09-02 Bump electrode of integrated circuit device

Publications (1)

Publication Number Publication Date
JPH0562977A true JPH0562977A (en) 1993-03-12

Family

ID=16757054

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22081991A Pending JPH0562977A (en) 1991-09-02 1991-09-02 Bump electrode of integrated circuit device

Country Status (1)

Country Link
JP (1) JPH0562977A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6103551A (en) * 1996-03-06 2000-08-15 Matsushita Electric Industrial Co., Ltd. Semiconductor unit and method for manufacturing the same
US6452280B1 (en) 1996-03-06 2002-09-17 Matsushita Electric Industrial Co., Ltd. Flip chip semiconductor apparatus with projecting electrodes and method for producing same
WO2021177034A1 (en) * 2020-03-03 2021-09-10 ローム株式会社 Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6103551A (en) * 1996-03-06 2000-08-15 Matsushita Electric Industrial Co., Ltd. Semiconductor unit and method for manufacturing the same
US6452280B1 (en) 1996-03-06 2002-09-17 Matsushita Electric Industrial Co., Ltd. Flip chip semiconductor apparatus with projecting electrodes and method for producing same
WO2021177034A1 (en) * 2020-03-03 2021-09-10 ローム株式会社 Semiconductor device

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