JPS6451295A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPS6451295A
JPS6451295A JP20866887A JP20866887A JPS6451295A JP S6451295 A JPS6451295 A JP S6451295A JP 20866887 A JP20866887 A JP 20866887A JP 20866887 A JP20866887 A JP 20866887A JP S6451295 A JPS6451295 A JP S6451295A
Authority
JP
Japan
Prior art keywords
hole
circuit board
printed circuit
prepared hole
punching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20866887A
Other languages
Japanese (ja)
Other versions
JP2523672B2 (en
Inventor
Yasuyuki Okatsu
Akira Koyama
Yasunori Takatsu
Takaji Minami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62208668A priority Critical patent/JP2523672B2/en
Publication of JPS6451295A publication Critical patent/JPS6451295A/en
Application granted granted Critical
Publication of JP2523672B2 publication Critical patent/JP2523672B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching

Landscapes

  • Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)

Abstract

PURPOSE: To reduce shearing resistance in punching, prevent crack from being formed between punched holes, and improve the quality of a printed circuit board by forming a prepared hole and by punching the printed circuit board by a die punch with the diameter larger than that of the prepared hole. CONSTITUTION: A small prepared hole 5d is bored in a printed circuit board 5a by a drill 5b. Secondly, a conductive hole 5f formed by treating the prepared hole 5d by copper plating 5e is punched through by a die punch 5d with the diameter larger than that of the prepared hole 5d so as to form a nonconductive hole 5c in the printed circuit board 5a. The stress formed then is relieved to a hole trunk part of the prepared hole 5d to drastically reduce the shearing resistance so that no crack is formed between the hole 5c and the hole 5c which are approached to each other by the impact of the punching.
JP62208668A 1987-08-21 1987-08-21 Manufacturing method of printed wiring board Expired - Lifetime JP2523672B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62208668A JP2523672B2 (en) 1987-08-21 1987-08-21 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62208668A JP2523672B2 (en) 1987-08-21 1987-08-21 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPS6451295A true JPS6451295A (en) 1989-02-27
JP2523672B2 JP2523672B2 (en) 1996-08-14

Family

ID=16560075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62208668A Expired - Lifetime JP2523672B2 (en) 1987-08-21 1987-08-21 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JP2523672B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03166800A (en) * 1989-11-25 1991-07-18 S M C:Kk Component mounting method for printed wiring board
JPH07112399A (en) * 1993-10-19 1995-05-02 Tdk Corp Punching method for tape-form member

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58205625A (en) * 1982-05-25 1983-11-30 Shin Kobe Electric Mach Co Ltd Die for blanking laminated sheet

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58205625A (en) * 1982-05-25 1983-11-30 Shin Kobe Electric Mach Co Ltd Die for blanking laminated sheet

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03166800A (en) * 1989-11-25 1991-07-18 S M C:Kk Component mounting method for printed wiring board
JPH07112399A (en) * 1993-10-19 1995-05-02 Tdk Corp Punching method for tape-form member

Also Published As

Publication number Publication date
JP2523672B2 (en) 1996-08-14

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