WO2000046877A3 - Printed circuit boards with solid interconnect and method of producing the same - Google Patents

Printed circuit boards with solid interconnect and method of producing the same Download PDF

Info

Publication number
WO2000046877A3
WO2000046877A3 PCT/SG2000/000006 SG0000006W WO0046877A3 WO 2000046877 A3 WO2000046877 A3 WO 2000046877A3 SG 0000006 W SG0000006 W SG 0000006W WO 0046877 A3 WO0046877 A3 WO 0046877A3
Authority
WO
WIPO (PCT)
Prior art keywords
interconnect
producing
printed circuit
metallic
dielectric layer
Prior art date
Application number
PCT/SG2000/000006
Other languages
French (fr)
Other versions
WO2000046877A2 (en
Inventor
Ah Lim Chua
Original Assignee
Gul Technologies Singapore Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gul Technologies Singapore Ltd filed Critical Gul Technologies Singapore Ltd
Priority to AU36900/00A priority Critical patent/AU3690000A/en
Publication of WO2000046877A2 publication Critical patent/WO2000046877A2/en
Publication of WO2000046877A3 publication Critical patent/WO2000046877A3/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/24996—With internal element bridging layers, nonplanar interface between layers, or intermediate layer of commingled adjacent foam layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Chemically Coating (AREA)

Abstract

A printed circuit board with a solid metallic interconnect (62) which gives a stable and effective electrical interconnection between metallic layers (58, 64) separated by one or more dielectric layers (56). The method of producing the interconnect involves creating the solid metallic interconnect (62) by metallic plating on the base copper (58) at the interconnecting location (60), followed by the lamination of the appropriate dielectric layer (56). This dielectric layer may have a pre-cut hole (60) corresponding to the solid metallic interconnect (62), which is registered with the interconnect before lamination. A layer of dielectric polymer is then removed from the interconnect by traditional methods. This is followed by electroless plating and conventional metallization and circuitry formation. This process may also be applied to interconnect which spans more than one dielectric layer (56).
PCT/SG2000/000006 1999-02-04 2000-01-14 Printed circuit boards with solid interconnect and method of producing the same WO2000046877A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU36900/00A AU3690000A (en) 1999-02-04 2000-01-14 Printed circuit boards with solid interconnect and method of producing the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SG9900806-2 1999-02-04
SG9900806A SG109405A1 (en) 1999-02-04 1999-02-04 Printed circuit boards with solid interconnect and method of producing the same

Publications (2)

Publication Number Publication Date
WO2000046877A2 WO2000046877A2 (en) 2000-08-10
WO2000046877A3 true WO2000046877A3 (en) 2002-06-13

Family

ID=20430279

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SG2000/000006 WO2000046877A2 (en) 1999-02-04 2000-01-14 Printed circuit boards with solid interconnect and method of producing the same

Country Status (6)

Country Link
US (1) US20010004489A1 (en)
CN (1) CN1399861A (en)
AU (1) AU3690000A (en)
SG (1) SG109405A1 (en)
TW (1) TW407447B (en)
WO (1) WO2000046877A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6772515B2 (en) * 2000-09-27 2004-08-10 Hitachi, Ltd. Method of producing multilayer printed wiring board
US6740222B2 (en) * 2001-06-07 2004-05-25 Agere Systems Inc. Method of manufacturing a printed wiring board having a discontinuous plating layer
JP4006618B2 (en) * 2001-09-26 2007-11-14 日鉱金属株式会社 Manufacturing method of copper foil with carrier and printed board using copper foil with carrier
KR100621550B1 (en) * 2004-03-17 2006-09-14 삼성전자주식회사 Method for fabricating tape wiring substrate
CN104821371B (en) * 2015-04-23 2017-10-13 曹先贵 A kind of preparation method of LED integration packagings substrate
WO2017110404A1 (en) * 2015-12-25 2017-06-29 三井金属鉱業株式会社 Copper foil with carrier, copper foil with resin and method for manufacturing printed wiring board

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0621655A (en) * 1992-07-01 1994-01-28 Fujitsu Ltd Manufacture of ceramic circuit board
JPH08222834A (en) * 1995-02-13 1996-08-30 Toppan Printing Co Ltd Formation of wiring circuit and manufacture of multilayered wiring circuit board
JPH08264939A (en) * 1995-03-28 1996-10-11 Toshiba Corp Manufacture of printed wiring board
JPH10189183A (en) * 1996-12-25 1998-07-21 Jsr Corp Stacked connector and adapter device for inspecting circuit board

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10163371A (en) * 1996-11-26 1998-06-19 Fuchigami Micro:Kk Wiring board for ic package and manufacture thereof
JP3543521B2 (en) * 1996-12-24 2004-07-14 日立化成工業株式会社 Manufacturing method of multilayer printed wiring board
JP3726391B2 (en) * 1996-12-25 2005-12-14 Ｊｓｒ株式会社 Method for manufacturing multilayer connector and method for manufacturing adapter device for circuit board inspection

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0621655A (en) * 1992-07-01 1994-01-28 Fujitsu Ltd Manufacture of ceramic circuit board
JPH08222834A (en) * 1995-02-13 1996-08-30 Toppan Printing Co Ltd Formation of wiring circuit and manufacture of multilayered wiring circuit board
JPH08264939A (en) * 1995-03-28 1996-10-11 Toshiba Corp Manufacture of printed wiring board
JPH10189183A (en) * 1996-12-25 1998-07-21 Jsr Corp Stacked connector and adapter device for inspecting circuit board

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN *

Also Published As

Publication number Publication date
CN1399861A (en) 2003-02-26
SG109405A1 (en) 2005-03-30
AU3690000A (en) 2000-08-25
WO2000046877A2 (en) 2000-08-10
TW407447B (en) 2000-10-01
US20010004489A1 (en) 2001-06-21

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