JPS645069A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS645069A
JPS645069A JP16179387A JP16179387A JPS645069A JP S645069 A JPS645069 A JP S645069A JP 16179387 A JP16179387 A JP 16179387A JP 16179387 A JP16179387 A JP 16179387A JP S645069 A JPS645069 A JP S645069A
Authority
JP
Japan
Prior art keywords
film
ions
impurity
oxide film
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16179387A
Other languages
Japanese (ja)
Inventor
Kunihiko Asahi
Yasushi Ueda
Toru Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP16179387A priority Critical patent/JPS645069A/en
Publication of JPS645069A publication Critical patent/JPS645069A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To increase an oxidation speed and suppress the rediffusion of an impurity by a method wherein, after a high impurity concentration polycrystalline silicon gate electrode is formed, boron ions are implanted and oxidization is carried out by oxidizing agent whose diffusion coefficient is equivalent to or larger than that of the high concentration impurity. CONSTITUTION:A silicon oxide film 2 which is to be a gate oxide film is formed on the surface of an n-type silicon substrate 1 and a high concentration phosphorus-doped polycrystalline silicon film 3 is selectively formed on the film 2 to form a gate electrode. After the film 2 is removed with the film 3 as a mask, a photoresist film 4 is formed on the film 3 and an offset region and BF2 ions are implanted over the whole surface to form a source region 5 and a drain region 6. Then, after the film 4 is removed, a silicon oxide film 7 is formed in a vapor atmosphere and, at the same time, BF2 ions are diffused to give the regions 5 and 6 required depths. After that, a low impurity concentration p-type offset region 8 is formed.
JP16179387A 1987-06-29 1987-06-29 Manufacture of semiconductor device Pending JPS645069A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16179387A JPS645069A (en) 1987-06-29 1987-06-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16179387A JPS645069A (en) 1987-06-29 1987-06-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS645069A true JPS645069A (en) 1989-01-10

Family

ID=15742019

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16179387A Pending JPS645069A (en) 1987-06-29 1987-06-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS645069A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5649163B2 (en) * 1979-04-13 1981-11-20
JPS60150672A (en) * 1984-01-18 1985-08-08 Toshiba Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5649163B2 (en) * 1979-04-13 1981-11-20
JPS60150672A (en) * 1984-01-18 1985-08-08 Toshiba Corp Manufacture of semiconductor device

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