JPS6450121A - Register file - Google Patents

Abstract

PURPOSE:To exactly check an error of a write address by simple constitution, without increasing the hardware quantity, by providing an address use sub- latching circuit, a latching circuit for an error check use signal, and an error checking circuit. CONSTITUTION:An address use sub-latching circuit group 8 latches outputs of (i) pieces of address use main latching circuit groups 3 corresponding to a bit for checking a write address of (i) bits (i=2). This circuit group 8 corresponds to each bit, respectively, of the write address of (i) bits and constituted of (i) pieces of latching circuits. Also, a check use main latching circuit 9 latches an address parity signal 14 being an error check use signal of the write address, and an output of the circuit 9 is latched by a check use sub- latching circuit 10. Subsequently, by outputs of these circuit groups 8 and the output of the circuit 10, an error check is executed through an error checking circuit 7. In such a way, the error check of the write address can be executed exactly, by a simple constitution without causing the increase of the hardware.