JPS6424533A - Circ encoder - Google Patents

Circ encoder

Info

Publication number
JPS6424533A
JPS6424533A JP18086687A JP18086687A JPS6424533A JP S6424533 A JPS6424533 A JP S6424533A JP 18086687 A JP18086687 A JP 18086687A JP 18086687 A JP18086687 A JP 18086687A JP S6424533 A JPS6424533 A JP S6424533A
Authority
JP
Japan
Prior art keywords
address
processes
delay
delay time
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18086687A
Other languages
Japanese (ja)
Inventor
Tetsushi Itoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP18086687A priority Critical patent/JPS6424533A/en
Publication of JPS6424533A publication Critical patent/JPS6424533A/en
Pending legal-status Critical Current

Links

Landscapes

  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To smoothly perform preceding and following delay processes without stagnation by giving all processes a common address standard and adding an offset address having on address corresponding to delay time required for delay and interleaving to a reference address which varies at each unit delay time. CONSTITUTION:A storage circuit stores input data, output data, and intermediate data with added parity data in specified addresses and is readable and writable at any time and an address generating circuit 20 which gives the common address standard to all processes and adds the offset address having the address corresponding to the delay time for each delay process and interleaving to the reference address varying in address standard at each unit delay time to specifies an address required to write and read data in and out of the storage circuit are provided. Thus, the reference address common to all the processes is only varied to accurately and securely perform complicate CIRC processing, and the time required for the processing can be shortened.
JP18086687A 1987-07-20 1987-07-20 Circ encoder Pending JPS6424533A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18086687A JPS6424533A (en) 1987-07-20 1987-07-20 Circ encoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18086687A JPS6424533A (en) 1987-07-20 1987-07-20 Circ encoder

Publications (1)

Publication Number Publication Date
JPS6424533A true JPS6424533A (en) 1989-01-26

Family

ID=16090720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18086687A Pending JPS6424533A (en) 1987-07-20 1987-07-20 Circ encoder

Country Status (1)

Country Link
JP (1) JPS6424533A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5164163A (en) * 1988-09-19 1992-11-17 Kabushiki Kaisha Kobe Seiko Sho Hydrocarbon reforming apparatus
JPH05342769A (en) * 1990-08-09 1993-12-24 Samsung Electron Co Ltd Cross-interleave circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5164163A (en) * 1988-09-19 1992-11-17 Kabushiki Kaisha Kobe Seiko Sho Hydrocarbon reforming apparatus
JPH05342769A (en) * 1990-08-09 1993-12-24 Samsung Electron Co Ltd Cross-interleave circuit

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