JPS6424533A - Circ encoder - Google Patents

Abstract

PURPOSE:To smoothly perform preceding and following delay processes without stagnation by giving all processes a common address standard and adding an offset address having on address corresponding to delay time required for delay and interleaving to a reference address which varies at each unit delay time. CONSTITUTION:A storage circuit stores input data, output data, and intermediate data with added parity data in specified addresses and is readable and writable at any time and an address generating circuit 20 which gives the common address standard to all processes and adds the offset address having the address corresponding to the delay time for each delay process and interleaving to the reference address varying in address standard at each unit delay time to specifies an address required to write and read data in and out of the storage circuit are provided. Thus, the reference address common to all the processes is only varied to accurately and securely perform complicate CIRC processing, and the time required for the processing can be shortened.