JPS6441975A - Simulator - Google Patents
SimulatorInfo
- Publication number
- JPS6441975A JPS6441975A JP62197659A JP19765987A JPS6441975A JP S6441975 A JPS6441975 A JP S6441975A JP 62197659 A JP62197659 A JP 62197659A JP 19765987 A JP19765987 A JP 19765987A JP S6441975 A JPS6441975 A JP S6441975A
- Authority
- JP
- Japan
- Prior art keywords
- event
- main body
- output
- inputs
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE:To constitute a high-speed simulator by making respective cycles execute simultaneously the processing of the condition reproducing of a necessary IC in parallel with a simulation main body. CONSTITUTION:When a setting part 4 inputs an event 100 from a simulation main body 10, the setting part 4 outputs a setting event 102. An IC 1 inputs a supplying event 104 from a vector memory 2, executes a prescribed action and outputs an output 105. When a control circuit 3 inputs a starting signal 101 of a clock to simulate from the simulation main body 10, the control circuit 3 starts immediately the supplying of a sweeping-out clock 103. As a result of executing a prescribed inside processing by the IC 1, when the IC 1 outputs the output 105, an event output part 5 senses the output and returns it as a response event 106 to the simulator main body 10.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62197659A JPS6441975A (en) | 1987-08-07 | 1987-08-07 | Simulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62197659A JPS6441975A (en) | 1987-08-07 | 1987-08-07 | Simulator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6441975A true JPS6441975A (en) | 1989-02-14 |
JPH0535909B2 JPH0535909B2 (en) | 1993-05-27 |
Family
ID=16378184
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62197659A Granted JPS6441975A (en) | 1987-08-07 | 1987-08-07 | Simulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6441975A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0352037A (en) * | 1989-07-20 | 1991-03-06 | Fujitsu Ltd | Time two-way simulation system |
-
1987
- 1987-08-07 JP JP62197659A patent/JPS6441975A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0352037A (en) * | 1989-07-20 | 1991-03-06 | Fujitsu Ltd | Time two-way simulation system |
Also Published As
Publication number | Publication date |
---|---|
JPH0535909B2 (en) | 1993-05-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS55153054A (en) | Logic circuit simulation system | |
EP0126163A4 (en) | Controller with status display unit. | |
GB8910596D0 (en) | Real-time control sequencer with state matrix logic | |
JPS6441975A (en) | Simulator | |
JPS5338373A (en) | Ic for watch | |
JPS53148353A (en) | Information processing unit | |
JPS57113169A (en) | Microcomputer | |
JPS56153461A (en) | Information processor | |
JPS6442734A (en) | Arithmetic circuit | |
JPS57169809A (en) | Programmable logic controller | |
JPS5587201A (en) | Double system controller | |
JPS5720833A (en) | Sequence controller | |
JPS5426771A (en) | Clock circuit | |
JPS5423342A (en) | Microprogram control system | |
JPS5374467A (en) | Electronic watch | |
JPS5453842A (en) | Program run control circuit | |
JPS6485417A (en) | Clock generating circuit | |
JPS57132203A (en) | Sequence controller | |
JPS5576434A (en) | Cursor control unit | |
JPS5523563A (en) | Computer system | |
JPS5753680A (en) | Electronic watch with melody | |
JPS5475251A (en) | Logic simulation processor | |
JPS5472643A (en) | Processing system for different speed multi-input operation | |
JPS57182248A (en) | Arithmetic processor | |
JPS5371772A (en) | Simulation load system of sequence controller |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |