JPS6485417A - Clock generating circuit - Google Patents
Clock generating circuitInfo
- Publication number
- JPS6485417A JPS6485417A JP62240866A JP24086687A JPS6485417A JP S6485417 A JPS6485417 A JP S6485417A JP 62240866 A JP62240866 A JP 62240866A JP 24086687 A JP24086687 A JP 24086687A JP S6485417 A JPS6485417 A JP S6485417A
- Authority
- JP
- Japan
- Prior art keywords
- lsi
- clock
- output
- duty
- low level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To operate the inside of an LSI normally even when the variance in the duty of a clock input signal of an LSI by controlling the duty of a clock in the inside of the LSI so as to activate the inside of the LSI. CONSTITUTION:A signal whose duty is unclear is given to a differentiation circuit 2 and a low level width is controlled and outputted so as to set sufficiently the set/reset flip-flop 4. Moreover, the output is retarded by a delay time equivalent to the circuit having a maximum delay time in a path operated at a half cycle of the clock in the inside of the LSI and outputted as a positive logic. The output of the set/reset flip-flop 4 goes to a high level when the output of the differentiation circuit 2 is at a low level and goes to a low level when the output of the delay circuit 3 is at a low level. The processing above is repeated sequentially to generate a clock. Even when the variance in the duty of the input signal is large, a half clock in the inside of LSI is not malfunctioned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62240866A JPS6485417A (en) | 1987-09-28 | 1987-09-28 | Clock generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62240866A JPS6485417A (en) | 1987-09-28 | 1987-09-28 | Clock generating circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6485417A true JPS6485417A (en) | 1989-03-30 |
Family
ID=17065868
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62240866A Pending JPS6485417A (en) | 1987-09-28 | 1987-09-28 | Clock generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6485417A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0522274A1 (en) * | 1991-06-24 | 1993-01-13 | International Business Machines Corporation | Process independent digital clock signal shaping network |
| JP2007267096A (en) * | 2006-03-29 | 2007-10-11 | Ntt Electornics Corp | Signal transmission circuit |
-
1987
- 1987-09-28 JP JP62240866A patent/JPS6485417A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0522274A1 (en) * | 1991-06-24 | 1993-01-13 | International Business Machines Corporation | Process independent digital clock signal shaping network |
| JP2007267096A (en) * | 2006-03-29 | 2007-10-11 | Ntt Electornics Corp | Signal transmission circuit |
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